From 8023eabde1dd3e830ee9a34437591070e60a1a75 Mon Sep 17 00:00:00 2001
From: Felix Held <felix.held@amd.corp-partner.google.com>
Date: Fri, 22 Oct 2021 23:41:33 +0200
Subject: cpu/amd,intel/*/Makefile: don't add cpu/x86/cache

Some CPUs don't use the ramstage-only x86_enable_cache helper function
to call enable_cache with some added port 0x80 and console output.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Suggested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ia44c7b150cd12d76e463903966f67d86750cbdd9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
---
 src/cpu/amd/pi/00730F01/Makefile.inc | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src/cpu/amd/pi/00730F01')

diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc
index 2e9d82bddb..f2263d042e 100644
--- a/src/cpu/amd/pi/00730F01/Makefile.inc
+++ b/src/cpu/amd/pi/00730F01/Makefile.inc
@@ -9,4 +9,3 @@ ramstage-y += update_microcode.c
 
 subdirs-y += ../../mtrr
 subdirs-y += ../../../x86/lapic
-subdirs-y += ../../../x86/cache
-- 
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