From 4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 8 Jul 2013 16:23:54 -0600 Subject: cpu: Fix spelling Change-Id: I69c46648de0689e9bed84c7726906024ad65e769 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/3729 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/amd/mtrr/amd_mtrr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/amd/mtrr/amd_mtrr.c') diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c index 2f3e6e340f..033ec53d3a 100644 --- a/src/cpu/amd/mtrr/amd_mtrr.c +++ b/src/cpu/amd/mtrr/amd_mtrr.c @@ -128,10 +128,10 @@ void amd_setup_mtrrs(void) } /* Now that I have mapped what is memory and what is not - * Setup the mtrrs so we can cache the memory. + * Set up the mtrrs so we can cache the memory. */ - // Rev. F K8 supports has SYSCFG_MSR_TOM2WB and dont need + // Rev. F K8 supports has SYSCFG_MSR_TOM2WB and doesn't need // variable MTRR to span memory above 4GB // Lower revisions K8 need variable MTRR over 4GB x86_setup_var_mtrrs(address_bits, has_tom2wb ? 0 : 1); -- cgit v1.2.3