From 9934b813da2556ab8159cfc13fb993ae98b04db4 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Thu, 10 May 2007 18:32:28 +0000 Subject: Fix the indent and whitespace to match LinuxBIOS standards Signed-off-by: Jordan Crouse Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/model_lx/cpubug.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'src/cpu/amd/model_lx/cpubug.c') diff --git a/src/cpu/amd/model_lx/cpubug.c b/src/cpu/amd/model_lx/cpubug.c index ce81929b18..1116a4ecf4 100644 --- a/src/cpu/amd/model_lx/cpubug.c +++ b/src/cpu/amd/model_lx/cpubug.c @@ -30,7 +30,6 @@ #include #include - /************************************************************************** * * pcideadlock @@ -40,27 +39,27 @@ * There is also fix code in cache and PCI functions. This bug is very is pervasive. * **************************************************************************/ -static void pcideadlock(void){ +static void pcideadlock(void) +{ msr_t msr; /* * forces serialization of all load misses. Setting this bit prevents the * DM pipe from backing up if a read request has to be held up waiting * for PCI writes to complete. - */ + */ msr = rdmsr(CPU_DM_CONFIG0); msr.lo |= DM_CONFIG0_LOWER_MISSER_SET; wrmsr(CPU_DM_CONFIG0, msr); - /* write serialize memory hole to PCI. Need to unWS when something is * shadowed regardless of cachablility. */ msr.lo = 0x021212121; msr.hi = 0x021212121; - wrmsr( CPU_RCONF_A0_BF, msr); - wrmsr( CPU_RCONF_C0_DF, msr); - wrmsr( CPU_RCONF_E0_FF, msr); + wrmsr(CPU_RCONF_A0_BF, msr); + wrmsr(CPU_RCONF_C0_DF, msr); + wrmsr(CPU_RCONF_E0_FF, msr); } /****************************************************************************/ @@ -74,17 +73,19 @@ static void pcideadlock(void){ /** to maintain coherency with and the cache is not enabled yet.*/ /***/ /****************************************************************************/ -static void disablememoryreadorder(void){ +static void disablememoryreadorder(void) +{ msr_t msr; msr = rdmsr(MC_CF8F_DATA); - msr.hi |= CF8F_UPPER_REORDER_DIS_SET; + msr.hi |= CF8F_UPPER_REORDER_DIS_SET; wrmsr(MC_CF8F_DATA, msr); } /* For cpu version C3. Should be the only released version */ -void cpubug(void) { - pcideadlock(); +void cpubug(void) +{ + pcideadlock(); disablememoryreadorder(); printk_debug("Done cpubug fixes \n"); } -- cgit v1.2.3