From 7c8d74c10335ef759f12e6746ae563bd776813f9 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 23 Aug 2016 21:41:43 +0200 Subject: src/cpu: Remove unnecessary whitespace before "\n" Change-Id: Iebdcc659bf2a3e738702c85ee86dbb71b504721a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16279 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Paul Menzel --- src/cpu/amd/family_10h-family_15h/fidvid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/amd/family_10h-family_15h/fidvid.c') diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index 9485ff494f..2e6e153508 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -134,7 +134,7 @@ static void enable_fid_change(u8 fid) dword |= (u32) fid & 0x1F; dword |= 1 << 5; // enable pci_write_config32(dev, 0xd4, dword); - printk(BIOS_DEBUG, "FID Change Node:%02x, F3xD4: %08x \n", i, + printk(BIOS_DEBUG, "FID Change Node:%02x, F3xD4: %08x\n", i, dword); } } @@ -758,7 +758,7 @@ static void fixPsNbVidBeforeWR(u32 newNbVid, u32 coreid, u32 dev, u8 pviMode) * PstatMaxVal is going to be 0 on cold reset anyway ? */ if (!(pci_read_config32(dev, 0xdc) & (~PS_MAX_VAL_MASK))) { - printk(BIOS_ERR,"F3xDC[PstateMaxVal] is zero. Northbridge voltage setting will fail. fixPsNbVidBeforeWR in fidvid.c needs fixing. See AMD # 31116 rev 3.48 BKDG 2.4.2.9.1 \n"); + printk(BIOS_ERR,"F3xDC[PstateMaxVal] is zero. Northbridge voltage setting will fail. fixPsNbVidBeforeWR in fidvid.c needs fixing. See AMD # 31116 rev 3.48 BKDG 2.4.2.9.1\n"); }; msr.lo &= ~0xFE000000; // clear nbvid -- cgit v1.2.3