From fb0a64ba77dbf1fa00d07453c76b875cd124cfcb Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 23 Nov 2005 21:01:08 +0000 Subject: CAR patch from YH LU git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/dualcore/amd_sibling.c | 24 +++++++----------------- src/cpu/amd/dualcore/dualcore.c | 27 +++++++++++++++++++++++++++ src/cpu/amd/dualcore/dualcore_id.c | 5 +++++ 3 files changed, 39 insertions(+), 17 deletions(-) (limited to 'src/cpu/amd/dualcore') diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c index c74b282cb6..4375a1d8a8 100644 --- a/src/cpu/amd/dualcore/amd_sibling.c +++ b/src/cpu/amd/dualcore/amd_sibling.c @@ -15,6 +15,7 @@ static int first_time = 1; static int disable_siblings = !CONFIG_LOGICAL_CPUS; + void amd_sibling_init(device_t cpu, struct node_core_id id) { unsigned long i; @@ -93,9 +94,13 @@ struct node_core_id get_node_core_id(void) return id; } +unsigned int read_nb_cfg_54(void) +{ + msr_t msr; + msr = rdmsr(NB_CFG_MSR); + return ( ( msr.hi >> (54-32)) & 1); +} - -#if 0 static int get_max_siblings(int nodes) { device_t dev; @@ -160,20 +165,6 @@ unsigned get_apicid_base(unsigned ioapic_num) nb_cfg_54 = read_nb_cfg_54(); -#if 0 - //it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it. - if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) { - //we need to check if e0 single core is there - int i; - for(i=0; i0) ) { @@ -199,4 +190,3 @@ unsigned get_apicid_base(unsigned ioapic_num) return apicid_base; } -#endif diff --git a/src/cpu/amd/dualcore/dualcore.c b/src/cpu/amd/dualcore/dualcore.c index 9c292b823c..3923891678 100644 --- a/src/cpu/amd/dualcore/dualcore.c +++ b/src/cpu/amd/dualcore/dualcore.c @@ -2,6 +2,31 @@ #include "cpu/amd/dualcore/dualcore_id.c" +static inline unsigned get_core_num_in_bsp(unsigned nodeid) +{ + return ((pci_read_config32(PCI_DEV(0, 0x18+nodeid, 3), 0xe8)>>12) & 3); +} + +static inline uint8_t set_apicid_cpuid_lo(void) +{ + if(is_cpu_pre_e0()) return 0; // pre_e0 can not be set + + + if(read_option(CMOS_VSTART_dual_core, CMOS_VLEN_dual_core, 0) != 0) { // disable dual_core + return 0; + } + + // set the NB_CFG[54]=1; why the OS will be happy with that ??? + msr_t msr; + msr = rdmsr(NB_CFG_MSR); + msr.hi |= (1<<(54-32)); // InitApicIdCpuIdLo + wrmsr(NB_CFG_MSR, msr); + + return 1; + +} + +#if USE_DCACHE_RAM == 0 static void do_k8_init_and_stop_secondaries(void) { struct node_core_id id; @@ -72,3 +97,5 @@ static void k8_init_and_stop_secondaries(void) do_k8_init_and_stop_secondaries(); } + +#endif diff --git a/src/cpu/amd/dualcore/dualcore_id.c b/src/cpu/amd/dualcore/dualcore_id.c index 75d977133a..35af4b909b 100644 --- a/src/cpu/amd/dualcore/dualcore_id.c +++ b/src/cpu/amd/dualcore/dualcore_id.c @@ -15,6 +15,11 @@ struct node_core_id { unsigned coreid:8; }; +static inline unsigned get_initial_apicid(void) +{ + return ((cpuid_ebx(1) >> 24) & 0xf); +} + static inline struct node_core_id get_node_core_id(unsigned nb_cfg_54) { struct node_core_id id; // get the apicid via cpuid(1) ebx[27:24] -- cgit v1.2.3