From 38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 8 Feb 2010 12:20:50 +0000 Subject: janitor task: unify and cleanup naming. cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer Acked-by: Patrick Georgi git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/dualcore/amd_sibling.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/amd/dualcore') diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c index deaa78cef0..9001ec76a7 100644 --- a/src/cpu/amd/dualcore/amd_sibling.c +++ b/src/cpu/amd/dualcore/amd_sibling.c @@ -78,7 +78,7 @@ unsigned get_apicid_base(unsigned ioapic_num) nb_cfg_54 = read_nb_cfg_54(); #if 0 - //it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it. + //it is for all e0 single core and nc_cfg_54 low is set, but in the romstage.c stage we do not set that bit for it. if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) { //we need to check if e0 single core is there int i; @@ -109,7 +109,7 @@ unsigned get_apicid_base(unsigned ioapic_num) if((apicid_base+ioapic_num-1)>0xf) { // We need to enable APIC EXT ID - printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n"); + printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n"); enable_apic_ext_id(nodes); } -- cgit v1.2.3