From fb0a64ba77dbf1fa00d07453c76b875cd124cfcb Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 23 Nov 2005 21:01:08 +0000 Subject: CAR patch from YH LU git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/car/clear_1m_ram.c | 53 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 src/cpu/amd/car/clear_1m_ram.c (limited to 'src/cpu/amd/car/clear_1m_ram.c') diff --git a/src/cpu/amd/car/clear_1m_ram.c b/src/cpu/amd/car/clear_1m_ram.c new file mode 100644 index 0000000000..85ba59cf73 --- /dev/null +++ b/src/cpu/amd/car/clear_1m_ram.c @@ -0,0 +1,53 @@ +/* by yhlu 6.2005 */ +/* be warned, this file will be used core 0/node 0 only */ + __asm__ volatile ( + + /* disable cache */ + "movl %cr0, %eax\n\t" + "orl $(0x1<<30),%eax\n\t" + "movl %eax, %cr0\n\t" + + /* enable caching for first 1M using variable mtrr */ + "movl $0x200, %ecx\n\t" + "xorl %edx, %edx\n\t" + "movl $(0 | 1), %eax\n\t" +// "movl $(0 | MTRR_TYPE_WRCOMB), %eax\n\t" + "wrmsr\n\t" + + "movl $0x201, %ecx\n\t" + "movl $0x0000000f, %edx\n\t" + "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t" + "wrmsr\n\t" + + /* clear the first 1M */ + "movl $0x0, %edi\n\t" + "cld\n\t" + "movl $(0x100000>>2), %ecx\n\t" + "xorl %eax, %eax\n\t" + "rep stosl\n\t" + + /* disable cache */ + "movl %cr0, %eax\n\t" + "orl $(0x1<<30),%eax\n\t" + "movl %eax, %cr0\n\t" + + /* enable caching for first 1M using variable mtrr */ + "movl $0x200, %ecx\n\t" + "xorl %edx, %edx\n\t" + "movl $(0 | 6), %eax\n\t" +// "movl $(0 | MTRR_TYPE_WRBACK), %eax\n\t" + "wrmsr\n\t" + + "movl $0x201, %ecx\n\t" + "movl $0x0000000f, %edx\n\t" + "movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t" + "wrmsr\n\t" + + + /* enable cache */ + "movl %cr0, %eax\n\t" + "andl $0x9fffffff,%eax\n\t" + "movl %eax, %cr0\n\t" + "invd\n\t" + + ); -- cgit v1.2.3