From e33c50d74c518e0ebe1f2d8e88cebd023bb94bcf Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Sun, 6 Oct 2019 17:39:44 +0200
Subject: cpu/amd/{agesa,pi}: Select NO_FIXED_XIP_ROM_SIZE

AGESA and binaryPI set the whole CACHE_ROM_SIZE to WRPROT during the
romstage and do not reference the CONFIG_XIP_ROM_SIZE symbol.

Change-Id: I548b9c9066d825c2f03749353b9990b2efddfd9c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
 src/cpu/amd/agesa/family16kb/Kconfig | 4 ----
 1 file changed, 4 deletions(-)

(limited to 'src/cpu/amd/agesa/family16kb')

diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig
index 9fef94d327..e87a2d4e42 100644
--- a/src/cpu/amd/agesa/family16kb/Kconfig
+++ b/src/cpu/amd/agesa/family16kb/Kconfig
@@ -21,10 +21,6 @@ config CPU_ADDR_BITS
 	int
 	default 40
 
-config XIP_ROM_SIZE
-	hex
-	default 0x100000
-
 config FORCE_AM1_SOCKET_SUPPORT
 	bool
 	default n
-- 
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