From 8a643703b87630b4346e52cac3d3acdc95ac1c70 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Tue, 23 Oct 2018 17:10:27 +0200
Subject: {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros

Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29243
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/cpu/amd/agesa/family16kb/fixme.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/cpu/amd/agesa/family16kb')

diff --git a/src/cpu/amd/agesa/family16kb/fixme.c b/src/cpu/amd/agesa/family16kb/fixme.c
index c761d6d22f..2d74c7b769 100644
--- a/src/cpu/amd/agesa/family16kb/fixme.c
+++ b/src/cpu/amd/agesa/family16kb/fixme.c
@@ -15,6 +15,7 @@
 
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/msr.h>
+#include <cpu/amd/mtrr.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
 #include <AGESA.h>
 #include "amdlib.h"
@@ -47,7 +48,7 @@ void amd_initcpuio(void)
 	PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x8C);
 	PciData = 0x00FECF00; /* last address before non-posted range */
 	LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
-	LibAmdMsrRead (0xC001001A, &MsrReg, &StdHeader);
+	LibAmdMsrRead(TOP_MEM, &MsrReg, &StdHeader);
 	MsrReg = (MsrReg >> 8) | 3;
 	PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x88);
 	PciData = (UINT32)MsrReg;
-- 
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