From 065b7da298953feaec3563bf753f45cf00fba2c0 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Tue, 15 Apr 2014 15:41:38 -0500 Subject: cpu/amd/agesa/family15tn: Add udelay implementation for SMM This is a small implementation which uses only MSRs and rdtsc, without relying on northbridge or other system hardware. It's SMM safe in that it only reads registers, and doesn't modify the state of the hardware. Change-Id: Ifa02ca73455b382f830c9b30b80b4f1bb18706b4 Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/5501 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel --- src/cpu/amd/agesa/family15tn/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/cpu/amd/agesa/family15tn/Makefile.inc') diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 19a2f0f298..a8f644d241 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -20,6 +20,8 @@ ramstage-y += chip_name.c ramstage-y += model_15_init.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c + subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -- cgit v1.2.3