From e33c50d74c518e0ebe1f2d8e88cebd023bb94bcf Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 6 Oct 2019 17:39:44 +0200 Subject: cpu/amd/{agesa,pi}: Select NO_FIXED_XIP_ROM_SIZE AGESA and binaryPI set the whole CACHE_ROM_SIZE to WRPROT during the romstage and do not reference the CONFIG_XIP_ROM_SIZE symbol. Change-Id: I548b9c9066d825c2f03749353b9990b2efddfd9c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/35825 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson Reviewed-by: Paul Menzel --- src/cpu/amd/agesa/family12/Kconfig | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/cpu/amd/agesa/family12/Kconfig') diff --git a/src/cpu/amd/agesa/family12/Kconfig b/src/cpu/amd/agesa/family12/Kconfig index 4fc2ba076c..0324d129a3 100644 --- a/src/cpu/amd/agesa/family12/Kconfig +++ b/src/cpu/amd/agesa/family12/Kconfig @@ -21,8 +21,4 @@ config CPU_ADDR_BITS int default 48 -config XIP_ROM_SIZE - hex - default 0x80000 - endif -- cgit v1.2.3