From df7ff31c5985d9c8e37c9f780c02c61e652181c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 25 Nov 2016 12:02:00 +0200 Subject: AGESA: Move romstage main entry under cpu MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As we now apply asmlinkage attributes to romstage_main() entry, also x86_64 passes parameters on the stack. Change-Id: If9938dbbe9a164c9c1029431499b51ffccb459c1 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/18624 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/amd/agesa/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/amd/agesa/Makefile.inc') diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index 9853d63c5f..19f79756dc 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -27,6 +27,7 @@ ifeq ($(CONFIG_AGESA_LEGACY), y) cpu_incs-y += $(src)/cpu/amd/agesa/cache_as_ram_legacy.inc else cpu_incs-y += $(src)/cpu/amd/agesa/cache_as_ram.inc +romstage-y += romstage.c endif romstage-y += heapmanager.c -- cgit v1.2.3