From d4955f0ade18cafde4a3ea20885eb9fbdc5b4514 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Fri, 8 Sep 2017 07:14:17 +0300 Subject: AGESA: Move API interface under drivers/ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New AGESA support files will be used for binaryPI platforms as well. Furthermore, some of those should move from split nb/ sb/ directories to soc/, so move support files for the API under drivers/. Change-Id: I549788091de91f61de8b9adc223d52ffb5732235 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21455 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/cpu/amd/agesa/Makefile.inc | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'src/cpu/amd/agesa/Makefile.inc') diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index f4ec2ce0b0..470e62f25d 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -18,20 +18,10 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15) += family15 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) += family15tn subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb -ramstage-y += s3_mtrr.c - ifeq ($(CONFIG_AGESA_LEGACY), y) cpu_incs-y += $(src)/cpu/amd/agesa/cache_as_ram_legacy.inc -else -cpu_incs-y += $(src)/cpu/amd/agesa/cache_as_ram.S -romstage-y += romstage.c mtrr_fixme.c endif -romstage-$(CONFIG_AGESA_LEGACY_WRAPPER) += heapmanager.c - -postcar-y += cache_as_ram.S - -ramstage-y += heapmanager.c ramstage-$(CONFIG_AGESA_LEGACY_WRAPPER) += amd_late_init.c ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) -- cgit v1.2.3