From 5c4bde70ae92626fc92ee51249912961a668bba1 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Sat, 28 Dec 2013 21:50:54 -0500 Subject: cpu/allwinner/a10: Add basic TWI (I²C) driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I11b10301199e5ff1a45d9b7d2958cc7b6667a29c Signed-off-by: Alexandru Gagniuc Reviewed-on: http://review.coreboot.org/4588 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/cpu/allwinner/a10/twi.h | 58 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 src/cpu/allwinner/a10/twi.h (limited to 'src/cpu/allwinner/a10/twi.h') diff --git a/src/cpu/allwinner/a10/twi.h b/src/cpu/allwinner/a10/twi.h new file mode 100644 index 0000000000..c5f2974140 --- /dev/null +++ b/src/cpu/allwinner/a10/twi.h @@ -0,0 +1,58 @@ +/* + * Definitions Two Wire Interface (TWI) (I²C) Allwinner CPUs + * + * Copyright (C) 2013 Alexandru Gagniuc + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#ifndef CPU_ALLWINNER_A10_TWI_H +#define CPU_ALLWINNER_A10_TWI_H + +#include + +/* TWI_CTL values */ +#define TWI_CTL_INT_EN (1 << 7) +#define TWI_CTL_BUS_EN (1 << 6) +#define TWI_CTL_M_START (1 << 5) +#define TWI_CTL_M_STOP (1 << 4) +#define TWI_CTL_INT_FLAG (1 << 3) +#define TWI_CTL_A_ACK (1 << 2) + +/* TWI_STAT values */ +enum twi_status { + TWI_STAT_BUS_ERROR = 0x00, /**< Bus error */ + TWI_STAT_TX_START = 0x08, /**< START sent */ + TWI_STAT_TX_RSTART = 0x10, /**< Repeated START sent */ + TWI_STAT_TX_AW_ACK = 0x18, /**< Sent address+read, ACK */ + TWI_STAT_TX_AW_NAK = 0x20, /**< Sent address+read, NAK */ + TWI_STAT_TXD_ACK = 0x28, /**< Sent data, got ACK */ + TWI_STAT_TXD_NAK = 0x30, /**< Sent data, no ACK */ + TWI_STAT_LOST_ARB = 0x38, /**< Lost arbitration */ + TWI_STAT_TX_AR_ACK = 0x40, /**< Sent address+write, ACK */ + TWI_STAT_TX_AR_NAK = 0x48, /**< Sent address+write, NAK */ + TWI_STAT_RXD_ACK = 0x50, /**< Got data, sent ACK */ + TWI_STAT_RXD_NAK = 0x58, /**< Got data, no ACK */ + TWI_STAT_IDLE = 0xf8, /**< Bus idle*/ +}; + +/* TWI_CLK values */ +#define TWI_CLK_M_MASK (0xf << 3) +#define TWI_CLK_M(m) (((m - 1) << 3) & TWI_CLK_M_MASK) +#define TWI_CLK_N_MASK (0x7 << 0) +#define TWI_CLK_N(n) (((n) << 3) & TWI_CLK_N_MASK) + +struct a1x_twi { + u32 addr; /**< 0x00: Slave address */ + u32 xaddr; /**< 0x04: Extended slave address */ + u32 data; /**< 0x08: Data byte */ + u32 ctl; /**< 0x0C: Control register */ + u32 stat; /**< 0x10: Status register */ + u32 clk; /**< 0x14: Clock control register */ + u32 reset; /**< 0x18: Software reset */ + u32 efr; /**< 0x1C: Enhanced Feature register */ + u32 lcr; /**< 0x20: Line control register */ +}; + +void a1x_twi_init(u8 bus, u32 speed_hz); + +#endif /* CPU_ALLWINNER_A10_TWI_H */ -- cgit v1.2.3