From 5d0893adced0423241dc016392ca9d4ce1340b2e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com> Date: Tue, 9 Jun 2020 11:46:32 +0300 Subject: console, PCI: Remove EARLY_PCI_BRIDGE support in verstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The purpose of pci_early_bridge_init() is to temporarily configure PCIe rootport (or PCI bridge) on bus 0 to configure PCI device BARs on the secondary bus. Currently used and tested only with UART_OXPCIE. Since those BARs do not reset on stage changes, it is not necessary to redo those steps for verstage or postcar. Note that the option does not really work with many of the later platforms where PCIe pins/links/lanes are configured late in FSP-M or similar blob. Change-Id: I148f44c76c61edcfd8ab1c8c531cd2e6ca343130 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> --- src/console/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/console') diff --git a/src/console/init.c b/src/console/init.c index 258efc027d..1dba9ad664 100644 --- a/src/console/init.c +++ b/src/console/init.c @@ -67,7 +67,7 @@ asmlinkage void console_init(void) if (CONFIG(DEBUG_CONSOLE_INIT)) console_inited = 1; - if (CONFIG(EARLY_PCI_BRIDGE) && !ENV_SMM && !ENV_RAMSTAGE) + if (CONFIG(EARLY_PCI_BRIDGE) && (ENV_BOOTBLOCK || ENV_ROMSTAGE)) pci_early_bridge_init(); console_hw_init(); -- cgit v1.2.3