From 4a216475f5382d4b0ccf5fb65cd79b7ca3b32ed4 Mon Sep 17 00:00:00 2001 From: Jacob Garber Date: Fri, 27 Dec 2019 14:18:32 -0700 Subject: src: Remove some romcc workarounds Now that romcc is gone, move cmos_post_init() into post.c, and remove some preprocessor workarounds. Change-Id: I0ee4551e476cdd1102e86e7efc74d5909f64a37b Signed-off-by: Jacob Garber Reviewed-on: https://review.coreboot.org/c/coreboot/+/37950 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: HAOUAS Elyes --- src/console/post.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'src/console') diff --git a/src/console/post.c b/src/console/post.c index 8c28ceb672..a426fccac2 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -82,6 +82,30 @@ void cmos_post_log(void) } } +void cmos_post_init(void) +{ + u8 magic = CMOS_POST_BANK_0_MAGIC; + + /* Switch to the other bank */ + switch (cmos_read(CMOS_POST_BANK_OFFSET)) { + case CMOS_POST_BANK_1_MAGIC: + break; + case CMOS_POST_BANK_0_MAGIC: + magic = CMOS_POST_BANK_1_MAGIC; + break; + default: + /* Initialize to zero */ + cmos_write(0, CMOS_POST_BANK_0_OFFSET); + cmos_write(0, CMOS_POST_BANK_1_OFFSET); +#if CONFIG(CMOS_POST_EXTRA) + cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); + cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); +#endif + } + + cmos_write(magic, CMOS_POST_BANK_OFFSET); +} + #if CONFIG(CMOS_POST_EXTRA) void post_log_extra(u32 value) { -- cgit v1.2.3