From c83239eabc3b09273294a013c4dcb84f09ab0241 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 5 Oct 2016 17:46:49 +0200 Subject: Hook up libhwbase in ramstage It's hidden behind a configuration option `CONFIG_RAMSTAGE_LIBHWBASE`. This also adds some glue code to use the coreboot console for debug output and our monotonic timer framework as timer backend. v2: Also update 3rdparty/libhwbase to the latest master commit. Change-Id: I8e8d50271b46aac1141f95ab55ad323ac0889a8d Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/16951 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Ronald G. Minnich --- src/console/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/console/Kconfig') diff --git a/src/console/Kconfig b/src/console/Kconfig index 8f74613847..caf91ab252 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -399,4 +399,13 @@ config NO_EARLY_BOOTBLOCK_POSTCODES POST codes that go out before the chipset's bootblock initialization can happen. This option suppresses those POST codes. +config HWBASE_DEBUG_CB + bool + default y if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8 + default n + +config HWBASE_DEBUG_NULL + def_bool y + depends on !HWBASE_DEBUG_CB + endmenu -- cgit v1.2.3