From 9a791dffeae2097aa0a18f645ce07acfed41b9bc Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 3 Apr 2006 20:38:34 +0000 Subject: new cache_as_ram support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/config/Options.lb | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'src/config') diff --git a/src/config/Options.lb b/src/config/Options.lb index b5569673d7..1342366fe9 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -280,11 +280,17 @@ define DCACHE_RAM_BASE comment "Base address of data cache when using it for temporary RAM" end define DCACHE_RAM_SIZE - default none + default 0x1000 format "0x%x" - export used + export always comment "Size of data cache when using it for temporary RAM" end +define DCACHE_RAM_GLOBAL_VAR_SIZE + default 0 + format "0x%x" + export always + comment "Size of region that for global variable of cache as ram stage" +end define XIP_ROM_BASE default 0 format "0x%x" @@ -310,7 +316,7 @@ define CONFIG_UNCOMPRESSED end define CONFIG_LB_MEM_TOPK format "%d" - default 1024 + default 2048 export always comment "Kilobytes of memory to initialized before executing code from RAM" end -- cgit v1.2.3