From 65a6d1714d7d986cb95be2190518a80562d5e509 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sun, 13 Aug 2023 13:03:50 +0000 Subject: soc/intel/cmn/cse: Refactor CSE RW FW Version implementation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch introduces a CSE firmware specific data in order to store Intel CSE and associated firmware related information which requires a sync between Pre-RAM and Post-RAM phase. This information will be used further to retrieve currently running CSE RW firmware instead of fetching the version information by sending a HECI cmd (which consumes 7ms-15ms depending upon the CSE operational state). Current implementation attempts to simply the CSE RW FW version store and retrieval operations as below * CSE sync in romstage (aka Pre-RAM) - Relying on .bss segment to store the CSE info data in absence of real physical memory and sync back into the CBMEM once available (after FSP-M exits). * CSE sync in ramstage (aka Post-RAM) - Directly stored the CSE RW version into the CBMEM (as CBMEM is online). BUG=b:285405031 TEST=Able to build and boot google/rex. Verified CSE RW FW version (for LITE SKU) is getting displayed without impacting the boot time. w/o this patch: 10:start of ramstage         722,257 (43) 17:starting LZ4 decompress (ignore for x86)  723,777 (1,520) w/ this patch: 10:start of ramstage                         722,257 (43) 17:starting LZ4 decompress (ignore for x86)  723,777 (1,520) Change-Id: Ia873af512851a682cf1fac0e128d842562a316ab Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/77174 Reviewed-by: Julius Werner Tested-by: build bot (Jenkins) Reviewed-by: Rizwan Qureshi --- src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/commonlib/bsd/include') diff --git a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h index 8e6e6cdc2f..342d8a3be2 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h +++ b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h @@ -88,6 +88,7 @@ #define CBMEM_ID_AMD_STB 0x5f425453 #define CBMEM_ID_AMD_MP2 0x5f32504d #define CBMEM_ID_CSE_PARTITION_VERSION 0x43535056 +#define CBMEM_ID_CSE_INFO 0x4553435F #define CBMEM_ID_TO_NAME_TABLE \ { CBMEM_ID_ACPI, "ACPI " }, \ @@ -168,5 +169,6 @@ { CBMEM_ID_MEM_CHIP_INFO, "MEM CHIP INFO"},\ { CBMEM_ID_AMD_STB, "AMD STB"},\ { CBMEM_ID_AMD_MP2, "AMD MP2 BUFFER"},\ - { CBMEM_ID_CSE_PARTITION_VERSION, "CSE PARTITION VERSION"} + { CBMEM_ID_CSE_PARTITION_VERSION, "CSE PARTITION VERSION"},\ + { CBMEM_ID_CSE_INFO, "CSE SPECIFIC INFORMATION"} #endif /* _CBMEM_ID_H_ */ -- cgit v1.2.3