From ba757a71fef07d876f06a35b6374bcf00f40ded6 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Wed, 20 Dec 2023 09:07:04 -0800 Subject: x86: Separate CPU and SoC physical address size The physical address size of the System-on-Chip (SoC) can be different from the CPU physical address size. These two different physical address sizes should be used for settings of their respective field. For instance, the physical address size related to the CPU should be used for MTRR programming while the physical address size of the SoC should be used for MMIO resource allocation. Typically, on Meteor Lake, the CPUs physical address size is 46 if TME is disabled and 42 if TME is enabled but Meteor Lake SoC physical address size is always 42. As a result, MTRRs should reflect the TME status while coreboot MMIO resource allocator should always use 42 bits. This commit introduces `SOC_PHYSICAL_ADDRESS_WIDTH' Kconfig to set the physical address size of the SoC for those SoCs. BUG=b:314886709 TEST=MTRR are aligned between coreboot and FSP Change-Id: Icb76242718581357e5c62c2465690cf489cb1375 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/79665 Reviewed-by: Paul Menzel Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/arch/x86/Kconfig | 12 ++++++++++++ src/arch/x86/cpu_common.c | 8 ++++++++ 2 files changed, 20 insertions(+) (limited to 'src/arch') diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 90ece988c0..e149f0864e 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -391,4 +391,16 @@ config DUMP_SMBIOS_TYPE17 bool "Dump part of SMBIOS type17 dimm information" depends on GENERATE_SMBIOS_TABLES +config SOC_PHYSICAL_ADDRESS_WIDTH + int + default 0 + help + On some System-on-Chip the physical address size available + at the SoC level may be different than at the CPU + level. This configuration can be use to set the physical + address width (in bits) of the SoC. + + If not set, both CPU and SoC physical address width are + assume to be the same. + endif diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c index 0242dcebdd..c4d30a2c06 100644 --- a/src/arch/x86/cpu_common.c +++ b/src/arch/x86/cpu_common.c @@ -60,6 +60,14 @@ unsigned int cpu_phys_address_size(void) return 32; } +unsigned int soc_phys_address_size(void) +{ + if (CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH) + return CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH; + + return cpu_phys_address_size(); +} + /* * Get processor id using cpuid eax=1 * return value in EAX register -- cgit v1.2.3