From ac24a96579d1b26978081b7cf29874474aabc525 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 30 Dec 2021 21:12:35 +0100 Subject: arch/x86/spinlock.h: Support systems with >128 cores MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Each time the spinlock is acquired a byte is decreased and then the sign of the byte is checked. If there are more than 128 cores the sign check will overflow. An easy fix is to increase the word size of the spinlock acquiring and releasing. TEST: See that serialized SMM relocation is still serialized on systems with >128 cores. Change-Id: I76afaa60669335090743d99381280e74aa9fb5b1 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/60539 Reviewed-by: Kyösti Mälkki Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/arch/x86/include/arch/smp/spinlock.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/arch') diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index c7008c1b8c..cb25531b15 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -25,17 +25,17 @@ typedef struct { * We make no fairness assumptions. They have a cost. */ #define barrier() __asm__ __volatile__("" : : : "memory") -#define spin_is_locked(x) (*(volatile char *)(&(x)->lock) <= 0) +#define spin_is_locked(x) (*(volatile int *)(&(x)->lock) <= 0) #define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x)) #undef barrier #define spin_lock_string \ "\n1:\t" \ - "lock ; decb %0\n\t" \ + "lock ; decl %0\n\t" \ "js 2f\n" \ ".section .text.lock,\"ax\"\n" \ "2:\t" \ - "cmpb $0,%0\n\t" \ + "cmpl $0,%0\n\t" \ "rep;nop\n\t" \ "jle 2b\n\t" \ "jmp 1b\n" \ @@ -45,7 +45,7 @@ typedef struct { * This works. Despite all the confusion. */ #define spin_unlock_string \ - "movb $1,%0" + "movl $1,%0" static __always_inline void spin_lock(spinlock_t *lock) { -- cgit v1.2.3