From a1e22b8192d5fc85995a41d0961c25293ba4391f Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 18 Mar 2019 22:49:36 +0100 Subject: src: Use 'include ' when appropriate MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Drop 'include ' when it is not used and add it when it is missing. Also extra lines removed, or added just before local includes. Change-Id: Iccac4dbaa2dd4144fc347af36ecfc9747da3de20 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/31966 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: Kyösti Mälkki --- src/arch/arm64/boot.c | 1 - src/arch/riscv/trap_handler.c | 1 - src/arch/x86/boot.c | 1 - 3 files changed, 3 deletions(-) (limited to 'src/arch') diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index fefc0d305e..d17a20d628 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -19,7 +19,6 @@ #include #include #include -#include static void run_payload(struct prog *prog) { diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 6ec8e199f1..6b39faba79 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c index 7819c0f2db..5f60f1394a 100644 --- a/src/arch/x86/boot.c +++ b/src/arch/x86/boot.c @@ -15,7 +15,6 @@ #include #include #include -#include #include int payload_arch_usable_ram_quirk(uint64_t start, uint64_t size) -- cgit v1.2.3