From 4b2464fc90d60f01b0d890e1a0dc6dcdbd119617 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 23 Feb 2022 17:54:20 +0100 Subject: arch/x86: factor out and commonize HPET_BASE_ADDRESS definition All x86 chipsets and SoCs have the HPET MMIO base address at 0xfed00000, so define this once in arch/x86 and include this wherever needed. The old AMD AGESA code in vendorcode that has its own definition is left unchanged, but sb/amd/cimx/sb800/cfg.c is changed to use the new common definition. Signed-off-by: Felix Held Change-Id: Ifc624051cc6c0f125fa154e826cfbeaf41b4de83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62304 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons Reviewed-by: Fred Reitberger --- src/arch/x86/include/arch/hpet.h | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 src/arch/x86/include/arch/hpet.h (limited to 'src/arch') diff --git a/src/arch/x86/include/arch/hpet.h b/src/arch/x86/include/arch/hpet.h new file mode 100644 index 0000000000..224279eb6f --- /dev/null +++ b/src/arch/x86/include/arch/hpet.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ARCH_X86_HPET_H +#define ARCH_X86_HPET_H + +#define HPET_BASE_ADDRESS 0xfed00000 + +#endif /* ARCH_X86_HPET_H */ -- cgit v1.2.3