From 493937e1d67e734c2ac45f92280f2c2c22a50b85 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 25 Nov 2020 17:15:09 -0800 Subject: coreboot tables: Add SPI flash memory map windows to coreboot tables This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/arch/x86/mmap_boot.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/arch') diff --git a/src/arch/x86/mmap_boot.c b/src/arch/x86/mmap_boot.c index 66ba0e145b..f0ccc86fbe 100644 --- a/src/arch/x86/mmap_boot.c +++ b/src/arch/x86/mmap_boot.c @@ -2,6 +2,7 @@ #include #include +#include /* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */ #define rom_base ((void *)(uintptr_t)(0x100000000ULL-CONFIG_ROM_SIZE)) @@ -13,3 +14,12 @@ const struct region_device *boot_device_ro(void) { return &boot_dev.rdev; } + +uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table) +{ + table->flash_base = 0; + table->host_base = (uint32_t)(uintptr_t)rom_base; + table->size = CONFIG_ROM_SIZE; + + return 1; +} -- cgit v1.2.3