From 06ea8f9b9ac66860b35c9885cf37692edf447693 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Fri, 8 Feb 2019 19:01:13 +0200
Subject: arch/x86: Drop stale comment
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Change-Id: I1ba6dfb502ff053ccf82d2acc5fefbbfe09d647b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31294
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/arch/x86/include/arch/io.h | 5 -----
 1 file changed, 5 deletions(-)

(limited to 'src/arch')

diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index f62dc6cf96..1a27994ca7 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -216,11 +216,6 @@ static __always_inline void write64(volatile void *addr,
 
 #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
 
-/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write
- * memory above 4G, We don't need to set %fs, and %gs anymore
- * Before that We need to use %gs, and leave %fs to other RAM access
- */
-
 #include <arch/pci_io_cfg.h>
 #include <arch/pci_mmio_cfg.h>
 
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