From 86fc11d0c9b799f916d69ced72dc8a26a07591a2 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 9 Oct 2015 13:37:58 -0700 Subject: arm/arm64: Generalize bootblock C entry point When we first added ARM support to coreboot, it was clear that the bootblock would need to do vastly different tasks than on x86, so we moved its main logic under arch/. Now that we have several more architectures, it turns out (as with so many things lately) that x86 is really the odd one out, and all the others are trying to do pretty much the same thing. This has already caused maintenance issues as the ARM32 bootblock developed and less-mature architectures were left behind with old cruft. This patch tries to address that problem by centralizing that logic under lib/ for use by all architectures/SoCs that don't explicitly opt-out (with the slightly adapted existing BOOTBLOCK_CUSTOM option). This works great out of the box for ARM32 and ARM64. It could probably be easily applied to MIPS and RISCV as well, but I don't have any of those boards to test so I'll mark them as BOOTBLOCK_CUSTOM for now and leave that for later cleanup. BRANCH=None BUG=None TEST=Built Jerry and Falco, booted Oak. Change-Id: Ibbf727ad93651e388aef20e76f03f5567f9860cb Signed-off-by: Julius Werner Reviewed-on: http://review.coreboot.org/12076 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/arch/x86/Kconfig | 2 + src/arch/x86/bootblock_normal.c | 2 +- src/arch/x86/bootblock_simple.c | 2 +- src/arch/x86/include/arch/bootblock_common.h | 77 ++++++++++++++++++++++++++++ src/arch/x86/include/bootblock_common.h | 77 ---------------------------- 5 files changed, 81 insertions(+), 79 deletions(-) create mode 100644 src/arch/x86/include/arch/bootblock_common.h delete mode 100644 src/arch/x86/include/bootblock_common.h (limited to 'src/arch/x86') diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 88b259297c..738e7d1c0a 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -24,6 +24,7 @@ config ARCH_BOOTBLOCK_X86_32 bool default n select ARCH_X86 + select BOOTBLOCK_CUSTOM config ARCH_VERSTAGE_X86_32 bool @@ -43,6 +44,7 @@ config ARCH_BOOTBLOCK_X86_64 bool default n select ARCH_X86 + select BOOTBLOCK_CUSTOM config ARCH_VERSTAGE_X86_64 bool diff --git a/src/arch/x86/bootblock_normal.c b/src/arch/x86/bootblock_normal.c index a4dc3c4d25..d5f03b7699 100644 --- a/src/arch/x86/bootblock_normal.c +++ b/src/arch/x86/bootblock_normal.c @@ -1,5 +1,5 @@ #include -#include +#include #include #include diff --git a/src/arch/x86/bootblock_simple.c b/src/arch/x86/bootblock_simple.c index bb0591fb53..4bff360a08 100644 --- a/src/arch/x86/bootblock_simple.c +++ b/src/arch/x86/bootblock_simple.c @@ -1,5 +1,5 @@ #include -#include +#include #include static void main(unsigned long bist) diff --git a/src/arch/x86/include/arch/bootblock_common.h b/src/arch/x86/include/arch/bootblock_common.h new file mode 100644 index 0000000000..939ba08a67 --- /dev/null +++ b/src/arch/x86/include/arch/bootblock_common.h @@ -0,0 +1,77 @@ +#include +#include +#include + +#ifdef CONFIG_BOOTBLOCK_RESETS +#include CONFIG_BOOTBLOCK_RESETS +#endif + +#ifdef CONFIG_BOOTBLOCK_CPU_INIT +#include CONFIG_BOOTBLOCK_CPU_INIT +#endif +#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT +#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT +#endif +#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT +#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT +#endif + +#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT +#include CONFIG_BOOTBLOCK_MAINBOARD_INIT +#else +static void bootblock_mainboard_init(void) +{ +#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT + bootblock_northbridge_init(); +#endif +#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT + bootblock_southbridge_init(); +#endif +#ifdef CONFIG_BOOTBLOCK_CPU_INIT + bootblock_cpu_init(); +#endif +} +#endif + +#if CONFIG_USE_OPTION_TABLE +static void sanitize_cmos(void) +{ + if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) { + unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default"); + if (cmos_default) { + int i; + cmos_disable_rtc(); + for (i = 14; i < 128; i++) { + cmos_write_inner(cmos_default[i], i); + } + cmos_enable_rtc(); + } + } +} +#endif + +#if CONFIG_CMOS_POST +static void cmos_post_init(void) +{ + u8 magic = CMOS_POST_BANK_0_MAGIC; + + /* Switch to the other bank */ + switch (cmos_read(CMOS_POST_BANK_OFFSET)) { + case CMOS_POST_BANK_1_MAGIC: + break; + case CMOS_POST_BANK_0_MAGIC: + magic = CMOS_POST_BANK_1_MAGIC; + break; + default: + /* Initialize to zero */ + cmos_write(0, CMOS_POST_BANK_0_OFFSET); + cmos_write(0, CMOS_POST_BANK_1_OFFSET); +#if CONFIG_CMOS_POST_EXTRA + cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); + cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); +#endif + } + + cmos_write(magic, CMOS_POST_BANK_OFFSET); +} +#endif diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h deleted file mode 100644 index 939ba08a67..0000000000 --- a/src/arch/x86/include/bootblock_common.h +++ /dev/null @@ -1,77 +0,0 @@ -#include -#include -#include - -#ifdef CONFIG_BOOTBLOCK_RESETS -#include CONFIG_BOOTBLOCK_RESETS -#endif - -#ifdef CONFIG_BOOTBLOCK_CPU_INIT -#include CONFIG_BOOTBLOCK_CPU_INIT -#endif -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#endif - -#ifdef CONFIG_BOOTBLOCK_MAINBOARD_INIT -#include CONFIG_BOOTBLOCK_MAINBOARD_INIT -#else -static void bootblock_mainboard_init(void) -{ -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT - bootblock_northbridge_init(); -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT - bootblock_southbridge_init(); -#endif -#ifdef CONFIG_BOOTBLOCK_CPU_INIT - bootblock_cpu_init(); -#endif -} -#endif - -#if CONFIG_USE_OPTION_TABLE -static void sanitize_cmos(void) -{ - if (cmos_error() || !cmos_chksum_valid() || IS_ENABLED(CONFIG_STATIC_OPTION_TABLE)) { - unsigned char *cmos_default = (unsigned char*)walkcbfs("cmos.default"); - if (cmos_default) { - int i; - cmos_disable_rtc(); - for (i = 14; i < 128; i++) { - cmos_write_inner(cmos_default[i], i); - } - cmos_enable_rtc(); - } - } -} -#endif - -#if CONFIG_CMOS_POST -static void cmos_post_init(void) -{ - u8 magic = CMOS_POST_BANK_0_MAGIC; - - /* Switch to the other bank */ - switch (cmos_read(CMOS_POST_BANK_OFFSET)) { - case CMOS_POST_BANK_1_MAGIC: - break; - case CMOS_POST_BANK_0_MAGIC: - magic = CMOS_POST_BANK_1_MAGIC; - break; - default: - /* Initialize to zero */ - cmos_write(0, CMOS_POST_BANK_0_OFFSET); - cmos_write(0, CMOS_POST_BANK_1_OFFSET); -#if CONFIG_CMOS_POST_EXTRA - cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); - cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); -#endif - } - - cmos_write(magic, CMOS_POST_BANK_OFFSET); -} -#endif -- cgit v1.2.3