From 2da9524aaf90b6b2f4d7fab81bfc82c9829e3d32 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 12 Jun 2015 17:30:33 -0700 Subject: x86 cpu: Allow some cpuid functions during romstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow calls to cpu_phys_address_size and its support functions during romstage. This enables the proper display of MTRRs during romstage without duplicating this code. BRANCH=none BUG=None TEST=Build and run on cyan Change-Id: I6f6465c150a683ce91f1494ebb5d9ac60b75b795 Signed-off-by: Patrick Georgi Original-Commit-Id: 6bfd517088b6a2e8a5958a837e6c8c471de19fd0 Original-Change-Id: I429f9beb69298836acdd71d17a7bcb717939dfc2 Original-Signed-off-by: Lee Leahy Original-Reviewed-on: https://chromium-review.googlesource.com/277392 Original-Reviewed-by: Aaron Durbin Original-Tested-by: Leroy P Leahy Original-Commit-Queue: Leroy P Leahy Reviewed-on: http://review.coreboot.org/10561 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/arch/x86/lib/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/x86/lib/Makefile.inc') diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index 1b111d8c17..ccfe30ae67 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y) romstage-y += cbfs_and_run.c +romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c romstage-y += memset.c romstage-y += memcpy.c romstage-y += memmove.c @@ -13,6 +14,7 @@ ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) ramstage-y += c_start.S ramstage-y += cpu.c +ramstage-y += cpu_common.c ramstage-y += pci_ops_conf1.c ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c ramstage-y += exception.c -- cgit v1.2.3