From b6e97b19ae6a68556838c9801c7824302d72151f Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Sun, 9 Sep 2012 19:09:56 -0700 Subject: Add support for storing POST codes in CMOS This will use 3 bytes of CMOS to keep track of the POST code for the current boot while also leaving a record of the previous boot. The active bank is switched early in the bootblock. Test: 1) clear cmos 2) reboot 3) use "mosys nvram dump" to verify that the first byte contains 0x80 and the second byte contains 0xF8 4) powerd_suspend and then resume 5) use "mosys nvram dump" to verify that the first byte contains 0x81 and the second byte contains 0xFD Change-Id: I1ee6bb2dac053018f3042ab5a0b26c435dbfd151 Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/x86/init/bootblock_simple.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/arch/x86/init') diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c index 41f73b43b6..fd9ba2289b 100644 --- a/src/arch/x86/init/bootblock_simple.c +++ b/src/arch/x86/init/bootblock_simple.c @@ -9,6 +9,9 @@ static void main(unsigned long bist) #if CONFIG_USE_OPTION_TABLE sanitize_cmos(); +#endif +#if CONFIG_CMOS_POST + cmos_post_init(); #endif } -- cgit v1.2.3