From b6e97b19ae6a68556838c9801c7824302d72151f Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Sun, 9 Sep 2012 19:09:56 -0700 Subject: Add support for storing POST codes in CMOS This will use 3 bytes of CMOS to keep track of the POST code for the current boot while also leaving a record of the previous boot. The active bank is switched early in the bootblock. Test: 1) clear cmos 2) reboot 3) use "mosys nvram dump" to verify that the first byte contains 0x80 and the second byte contains 0xF8 4) powerd_suspend and then resume 5) use "mosys nvram dump" to verify that the first byte contains 0x81 and the second byte contains 0xFD Change-Id: I1ee6bb2dac053018f3042ab5a0b26c435dbfd151 Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/x86/include/bootblock_common.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'src/arch/x86/include') diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h index bd1968202f..c9674f4a9c 100644 --- a/src/arch/x86/include/bootblock_common.h +++ b/src/arch/x86/include/bootblock_common.h @@ -34,3 +34,27 @@ static void sanitize_cmos(void) } } #endif + +#if CONFIG_CMOS_POST +#include + +static void cmos_post_init(void) +{ + u8 magic = CMOS_POST_BANK_0_MAGIC; + + /* Switch to the other bank */ + switch (cmos_read(CMOS_POST_BANK_OFFSET)) { + case CMOS_POST_BANK_1_MAGIC: + break; + case CMOS_POST_BANK_0_MAGIC: + magic = CMOS_POST_BANK_1_MAGIC; + break; + default: + /* Initialize to zero */ + cmos_write(0, CMOS_POST_BANK_0_OFFSET); + cmos_write(0, CMOS_POST_BANK_1_OFFSET); + } + + cmos_write(magic, CMOS_POST_BANK_OFFSET); +} +#endif -- cgit v1.2.3