From 31e5133b63c2388e3307245a287f6f3046403e09 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Wed, 26 Apr 2023 14:40:39 +0200
Subject: arch/x86/include/pci_io_cfg: introduce PCI_IO_CONFIG_[INDEX,DATA]
define
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Instead of having multiple instances of the same magic numbers in the
code, introduce and use the PCI_IO_CONFIG_INDEX and PCI_IO_CONFIG_DATA
definitions.
TEST=Timeless build for Mandolin results in identical image.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If6f6f058180cf36cae7921ce3c7aaf1a0c75c7b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
---
src/arch/x86/include/arch/pci_io_cfg.h | 27 +++++++++++++++------------
1 file changed, 15 insertions(+), 12 deletions(-)
(limited to 'src/arch/x86/include')
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
index 5e69288f92..4cf8c7c17b 100644
--- a/src/arch/x86/include/arch/pci_io_cfg.h
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -7,6 +7,9 @@
#include <arch/io.h>
#include <device/pci_type.h>
+#define PCI_IO_CONFIG_INDEX 0xcf8
+#define PCI_IO_CONFIG_DATA 0xcfc
+
static __always_inline
uint32_t pci_io_encode_addr(pci_devfn_t dev, uint16_t reg)
{
@@ -25,48 +28,48 @@ static __always_inline
uint8_t pci_io_read_config8(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- return inb(0xCFC + (reg & 3));
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ return inb(PCI_IO_CONFIG_DATA + (reg & 3));
}
static __always_inline
uint16_t pci_io_read_config16(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- return inw(0xCFC + (reg & 2));
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ return inw(PCI_IO_CONFIG_DATA + (reg & 2));
}
static __always_inline
uint32_t pci_io_read_config32(pci_devfn_t dev, uint16_t reg)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- return inl(0xCFC);
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ return inl(PCI_IO_CONFIG_DATA);
}
static __always_inline
void pci_io_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- outb(value, 0xCFC + (reg & 3));
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ outb(value, PCI_IO_CONFIG_DATA + (reg & 3));
}
static __always_inline
void pci_io_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- outw(value, 0xCFC + (reg & 2));
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ outw(value, PCI_IO_CONFIG_DATA + (reg & 2));
}
static __always_inline
void pci_io_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
{
uint32_t addr = pci_io_encode_addr(dev, reg);
- outl(addr, 0xCF8);
- outl(value, 0xCFC);
+ outl(addr, PCI_IO_CONFIG_INDEX);
+ outl(value, PCI_IO_CONFIG_DATA);
}
#if !CONFIG(ECAM_MMCONF_SUPPORT)
--
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