From 4663f45caa2352760ee08ec28b9c2d6e2e8823f9 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 7 Mar 2019 14:18:28 +0200 Subject: device/pci_ops: Have only default PCI bus ops available MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In the current state of the tree we do not utilise the mechanism of having per-device overrides for PCI bus ops. This change effectively inlines all PCI config accessors for ramstage as well. Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31753 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Aaron Durbin --- src/arch/x86/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/arch/x86/Makefile.inc') diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index e3151ef1a9..6e4ee76c55 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -327,8 +327,6 @@ ramstage-y += memmove.c ramstage-y += memset.c ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c -ramstage-y += pci_ops_conf1.c -ramstage-$(CONFIG_NO_MMCONF_SUPPORT) += pci_ops.c ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c ramstage-y += rdrand.c ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c -- cgit v1.2.3