From 33fcaf91ff825ad0adf0a2a483e6a296ed4e0e31 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 10 Oct 2018 22:44:20 +0200 Subject: arch/x86: Implement common CF9 reset It's very common across many x86 silicon vendors, so place it in `arch/x86/`. Change-Id: I06c27afa31e5eecfdb7093c02f703bdaabf0594c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/29054 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/arch/x86/Makefile.inc | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/arch/x86/Makefile.inc') diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 7f85b6a3e6..730bc838fb 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -43,6 +43,12 @@ cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)) pci$(stripped_vgabios_id).rom-type := optionrom +verstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c +bootblock-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c +romstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c +ramstage-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c +postcar-$(CONFIG_HAVE_CF9_RESET) += cf9_reset.c + ############################################################################### # common support for early assembly includes ############################################################################### -- cgit v1.2.3