From 0c781b2694b2c137d9761704954ea38be5ba8a15 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 1 Apr 2010 09:50:32 +0000 Subject: =?UTF-8?q?-=C3=82=C2=A0get=20rid=20of=20ASM=5FCONSOLE=5FLOGLEVEL?= =?UTF-8?q?=20except=20in=20two=20assembler=20files.=20-=20start=20naming?= =?UTF-8?q?=20all=20versions=20of=20post=20code=20output=20"post=5Fcode()"?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/init/bootblock_prologue.c | 2 +- src/arch/i386/init/car.S | 2 +- src/arch/i386/init/crt0.S.lb | 10 +++++++--- 3 files changed, 9 insertions(+), 5 deletions(-) (limited to 'src/arch/i386/init') diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c index f921c3f8d0..4baaa08a6e 100644 --- a/src/arch/i386/init/bootblock_prologue.c +++ b/src/arch/i386/init/bootblock_prologue.c @@ -33,5 +33,5 @@ .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits - intel_chip_post_macro(0x01) /* delay for chipsets */ + post_code(0x01) /* delay for chipsets */ diff --git a/src/arch/i386/init/car.S b/src/arch/i386/init/car.S index 107da7b222..64743ef8fc 100644 --- a/src/arch/i386/init/car.S +++ b/src/arch/i386/init/car.S @@ -54,7 +54,7 @@ __protected_stage0: /* Save the BIST result. */ movl %eax, %ebp - intel_chip_post_macro(0x01) + post_code(0x01) movw $ROM_DATA_SEG, %ax movw %ax, %ds diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index c4206bf007..5e7a5fa8c7 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -25,6 +25,10 @@ #include #include +#ifndef ASM_CONSOLE_LOGLEVEL +#define ASM_CONSOLE_LOGLEVEL CONFIG_MAXIMUM_CONSOLE_LOGLEVEL +#endif + /* * This is the entry code the code in .reset section * jumps to this address. @@ -33,7 +37,7 @@ .section ".rom.data", "a", @progbits .section ".rom.text", "ax", @progbits - intel_chip_post_macro(0x01) /* delay for chipsets */ + post_code(0x01) /* delay for chipsets */ #include "crt0_includes.h" @@ -61,7 +65,7 @@ __main: * isn\'t really that big we just copy/clear using bytes, not * double words. */ - intel_chip_post_macro(0x11) /* post 11 */ + post_code(0x11) /* post 11 */ cld /* clear direction flag */ @@ -78,7 +82,7 @@ __main: call cbfs_and_run_core .Lhlt: - intel_chip_post_macro(0xee) /* post fe */ + post_code(0xee) /* post fe */ hlt jmp .Lhlt -- cgit v1.2.3