From 0867062412dd4bfe5a556e5f3fd85ba5b682d79b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Jun 2009 15:17:49 +0000 Subject: This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/init/car.S | 10 +++++----- src/arch/i386/init/crt0.S.lb | 28 ++++++++++++++-------------- src/arch/i386/init/ldscript.lb | 8 ++++---- src/arch/i386/init/ldscript_apc.lb | 2 +- src/arch/i386/init/ldscript_cbfs.lb | 6 +++--- src/arch/i386/init/ldscript_failover.lb | 6 +++--- src/arch/i386/init/ldscript_fallback.lb | 10 +++++----- src/arch/i386/init/ldscript_fallback_cbfs.lb | 8 ++++---- 8 files changed, 39 insertions(+), 39 deletions(-) (limited to 'src/arch/i386/init') diff --git a/src/arch/i386/init/car.S b/src/arch/i386/init/car.S index 94ffc648c5..98e40ad0cf 100644 --- a/src/arch/i386/init/car.S +++ b/src/arch/i386/init/car.S @@ -72,8 +72,8 @@ __protected_stage0: * the other is very similar to the AMD CAR, except remove amd specific msr */ -#define CacheSize DCACHE_RAM_SIZE -#define CacheBase DCACHE_RAM_BASE +#define CacheSize CONFIG_DCACHE_RAM_SIZE +#define CacheBase CONFIG_DCACHE_RAM_BASE #include @@ -241,14 +241,14 @@ clear_fixed_var_mtrr_out: */ movl $0x202, %ecx xorl %edx, %edx - movl $(XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax + movl $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax wrmsr movl $0x203, %ecx movl $0x0000000f, %edx - movl $(~(XIP_ROM_SIZE - 1) | 0x800), %eax + movl $(~(CONFIG_XIP_ROM_SIZE - 1) | 0x800), %eax wrmsr -#endif /* XIP_ROM_SIZE && XIP_ROM_BASE */ +#endif /* CONFIG_XIP_ROM_SIZE && CONFIG_XIP_ROM_BASE */ /* enable cache */ movl %cr0, %eax diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index cf7c2ab5e9..e60144840c 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -37,14 +37,14 @@ #include "crt0_includes.h" -#if USE_DCACHE_RAM == 0 +#if CONFIG_USE_DCACHE_RAM == 0 #ifndef CONSOLE_DEBUG_TX_STRING /* uses: esp, ebx, ax, dx */ # define __CRT_CONSOLE_TX_STRING(string) \ mov string, %ebx ; \ CALLSP(crt_console_tx_string) -# if defined(TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) +# if defined(CONFIG_TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) # define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) # else # define CONSOLE_DEBUG_TX_STRING(string) @@ -102,26 +102,26 @@ crt_console_tx_string: RETSP 9: /* Base Address */ -#ifndef TTYS0_BASE -#define TTYS0_BASE 0x3f8 +#ifndef CONFIG_TTYS0_BASE +#define CONFIG_TTYS0_BASE 0x3f8 #endif /* Data */ -#define TTYS0_RBR (TTYS0_BASE+0x00) +#define TTYS0_RBR (CONFIG_TTYS0_BASE+0x00) /* Control */ #define TTYS0_TBR TTYS0_RBR -#define TTYS0_IER (TTYS0_BASE+0x01) -#define TTYS0_IIR (TTYS0_BASE+0x02) +#define TTYS0_IER (CONFIG_TTYS0_BASE+0x01) +#define TTYS0_IIR (CONFIG_TTYS0_BASE+0x02) #define TTYS0_FCR TTYS0_IIR -#define TTYS0_LCR (TTYS0_BASE+0x03) -#define TTYS0_MCR (TTYS0_BASE+0x04) +#define TTYS0_LCR (CONFIG_TTYS0_BASE+0x03) +#define TTYS0_MCR (CONFIG_TTYS0_BASE+0x04) #define TTYS0_DLL TTYS0_RBR #define TTYS0_DLM TTYS0_IER /* Status */ -#define TTYS0_LSR (TTYS0_BASE+0x05) -#define TTYS0_MSR (TTYS0_BASE+0x06) -#define TTYS0_SCR (TTYS0_BASE+0x07) +#define TTYS0_LSR (CONFIG_TTYS0_BASE+0x05) +#define TTYS0_MSR (CONFIG_TTYS0_BASE+0x06) +#define TTYS0_SCR (CONFIG_TTYS0_BASE+0x07) mov %al, %ah 10: mov $TTYS0_LSR, %dx @@ -143,7 +143,7 @@ str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" #endif #if CONFIG_CBFS -# if USE_FALLBACK_IMAGE == 1 +# if CONFIG_USE_FALLBACK_IMAGE == 1 str_coreboot_ram_name: .string "fallback/coreboot_ram" # else str_coreboot_ram_name: .string "normal/coreboot_ram" @@ -154,4 +154,4 @@ str_pre_main: .string "Jumping to coreboot.\r\n" #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#endif /* USE_DCACHE_RAM */ +#endif /* CONFIG_USE_DCACHE_RAM */ diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb index 50a8c9965d..0ed5c47f53 100644 --- a/src/arch/i386/init/ldscript.lb +++ b/src/arch/i386/init/ldscript.lb @@ -1,12 +1,12 @@ /* * Memory map: * - * _RAMBASE + * CONFIG_RAMBASE * : data segment * : bss segment * : heap * : stack - * _ROMBASE + * CONFIG_ROMBASE * : coreboot text * : readonly text */ @@ -35,7 +35,7 @@ TARGET(binary) INPUT(coreboot_ram.rom) SECTIONS { - . = _ROMBASE; + . = CONFIG_ROMBASE; .ram . : { _ram = . ; @@ -56,7 +56,7 @@ SECTIONS _lrom = LOADADDR(.rom); _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = _RAMBASE; + _iseg = CONFIG_RAMBASE; _eiseg = _iseg + SIZEOF(.ram); _liseg = _ram; _eliseg = _eram; diff --git a/src/arch/i386/init/ldscript_apc.lb b/src/arch/i386/init/ldscript_apc.lb index ce491547b0..2c8cb84e63 100644 --- a/src/arch/i386/init/ldscript_apc.lb +++ b/src/arch/i386/init/ldscript_apc.lb @@ -6,7 +6,7 @@ SECTIONS coreboot_apc.rom(*) _eapcrom = .; } - _iseg_apc = DCACHE_RAM_BASE; + _iseg_apc = CONFIG_DCACHE_RAM_BASE; _eiseg_apc = _iseg_apc + SIZEOF(.apcrom); _liseg_apc = _apcrom; _eliseg_apc = _eapcrom; diff --git a/src/arch/i386/init/ldscript_cbfs.lb b/src/arch/i386/init/ldscript_cbfs.lb index e86befb1ca..37e867db21 100644 --- a/src/arch/i386/init/ldscript_cbfs.lb +++ b/src/arch/i386/init/ldscript_cbfs.lb @@ -1,12 +1,12 @@ /* * Memory map: * - * _RAMBASE + * CONFIG_RAMBASE * : data segment * : bss segment * : heap * : stack - * _ROMBASE + * CONFIG_ROMBASE * : coreboot text * : readonly text */ @@ -34,7 +34,7 @@ ENTRY(_start) TARGET(binary) SECTIONS { - . = _ROMBASE; + . = CONFIG_ROMBASE; /* This section might be better named .setup */ .rom . : { diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb index 064f159a50..099cae9d8a 100644 --- a/src/arch/i386/init/ldscript_failover.lb +++ b/src/arch/i386/init/ldscript_failover.lb @@ -1,12 +1,12 @@ /* * Memory map: * - * _RAMBASE + * CONFIG_RAMBASE * : data segment * : bss segment * : heap * : stack - * _ROMBASE + * CONFIG_ROMBASE * : coreboot text * : readonly text */ @@ -34,7 +34,7 @@ ENTRY(_start) TARGET(binary) SECTIONS { - . = _ROMBASE; + . = CONFIG_ROMBASE; /* This section might be better named .setup */ .rom . : { diff --git a/src/arch/i386/init/ldscript_fallback.lb b/src/arch/i386/init/ldscript_fallback.lb index a46c374520..6d41cbde87 100644 --- a/src/arch/i386/init/ldscript_fallback.lb +++ b/src/arch/i386/init/ldscript_fallback.lb @@ -1,12 +1,12 @@ /* * Memory map: * - * _RAMBASE + * CONFIG_RAMBASE * : data segment * : bss segment * : heap * : stack - * _ROMBASE + * CONFIG_ROMBASE * : coreboot text * : readonly text */ @@ -35,7 +35,7 @@ TARGET(binary) INPUT(coreboot_ram.rom) SECTIONS { - . = _ROMBASE; + . = CONFIG_ROMBASE; .ram . : { _ram = . ; @@ -45,7 +45,7 @@ SECTIONS /* cut _start into last 64k*/ _x = .; - . = (_x < (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE)) ? (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE) : _x; + . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; /* This section might be better named .setup */ .rom . : { @@ -61,7 +61,7 @@ SECTIONS _lrom = LOADADDR(.rom); _elrom = LOADADDR(.rom) + SIZEOF(.rom); - _iseg = _RAMBASE; + _iseg = CONFIG_RAMBASE; _eiseg = _iseg + SIZEOF(.ram); _liseg = _ram; _eliseg = _eram; diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/i386/init/ldscript_fallback_cbfs.lb index 52274d1356..eb3bf3f0d7 100644 --- a/src/arch/i386/init/ldscript_fallback_cbfs.lb +++ b/src/arch/i386/init/ldscript_fallback_cbfs.lb @@ -1,12 +1,12 @@ /* * Memory map: * - * _RAMBASE + * CONFIG_RAMBASE * : data segment * : bss segment * : heap * : stack - * _ROMBASE + * CONFIG_ROMBASE * : coreboot text * : readonly text */ @@ -34,11 +34,11 @@ ENTRY(_start) TARGET(binary) SECTIONS { - . = _ROMBASE; + . = CONFIG_ROMBASE; /* cut _start into last 64k*/ _x = .; - . = (_x < (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE)) ? (_ROMBASE - 0x10000 + ROM_IMAGE_SIZE) : _x; + . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; /* This section might be better named .setup */ .rom . : { -- cgit v1.2.3