From 17fd13a4a7bb369f558a33bb9c4c5911052a63ff Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 4 Jun 2018 14:55:01 +0200 Subject: arch/arm/armv7: Fix coding style Change-Id: Ib5d574347373009c8021597f555e6e86c2c0c41f Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/26831 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/arch/arm/armv7/mmu.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/arch/arm/armv7/mmu.c') diff --git a/src/arch/arm/armv7/mmu.c b/src/arch/arm/armv7/mmu.c index 957b4b6a7c..935f778ec5 100644 --- a/src/arch/arm/armv7/mmu.c +++ b/src/arch/arm/armv7/mmu.c @@ -45,8 +45,8 @@ #define ATTR_BLOCK (\ 0ULL << 54 | /* XN. 0:Not restricted */ \ 0ULL << 53 | /* PXN. 0:Not restricted */ \ - 1 << 10 | /* AF. 1:Accessed. This is to prevent access \ - * fault when accessed for the first time */ \ + 1 << 10 | /* AF. 1:Accessed. This is to prevent access */ \ + /* fault when accessed for the first time */ \ 0 << 6 | /* AP[2:1]. 0b00:full access from PL1 */ \ 0 << 5 | /* NS. 0:Output address is in Secure space */ \ 0 << 1 | /* block/table. 0:block entry */ \ @@ -219,7 +219,7 @@ void mmu_config_range_kb(u32 start_kb, u32 size_kb, enum dcache_policy policy) start_kb * KiB, (start_kb + size_kb) * KiB, attrs[policy].name); u32 end_kb = ALIGN_UP((start_kb + size_kb), PAGE_SIZE/KiB) - - (start_kb & ~mask); + (start_kb & ~mask); assert(end_kb <= BLOCK_SIZE/KiB); @@ -285,7 +285,7 @@ void mmu_init(void) int i; printk(BIOS_DEBUG, "LPAE Translation tables are @ %p\n", - ttb_buff); + ttb_buff); ASSERT((read_mmfr0() & 0xf) >= 5); /* @@ -308,7 +308,7 @@ void mmu_init(void) */ for (i = 0; i < 4; i++) { pgd_buff[i] = ((uint32_t)pmd & NEXTLEVEL_MASK) | - ATTR_NEXTLEVEL; + ATTR_NEXTLEVEL; pmd += BLOCK_SIZE / PAGE_SIZE; } -- cgit v1.2.3