From fc8da0010b45d920d666ad7f0310898a0b13a621 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 23 Jul 2020 19:01:29 -0600 Subject: arch/arm/armv7: Make null dcache_apply_all macro for userspace Make an empty macro for dcache_apply_all for code running in userspace so that we don't hang the system. BUG=b:161554141 TEST=Run board through a bunch of recovery cycles. Signed-off-by: Martin Roth Change-Id: I3dc0f40dfe4d4a699528068154eee2d3c23d3d74 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43787 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner Reviewed-by: Furquan Shaikh --- src/arch/arm/armv7/cpu.S | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src/arch/arm/armv7/cpu.S') diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S index 610659243d..c53119c8d1 100644 --- a/src/arch/arm/armv7/cpu.S +++ b/src/arch/arm/armv7/cpu.S @@ -23,6 +23,19 @@ * THIS FUNCTION MUST PRESERVE THE VALUE OF r10 */ +#if ENV_USER_SPACE +/* + * Empty macro for code running in userspace. Trying to manipulate the + * cache from userspace hangs the system. To run code at a privileged level, + * the userspace code needs to execute an API call to the privileged mode + * code. + */ +.macro dcache_apply_all crm + bx lr +.endm + +#else + .macro dcache_apply_all crm dsb mov r3, #-2 @ initialize level so that we start at 0 @@ -82,6 +95,8 @@ bx lr .endm +#endif /* ENV_USER_SPACE */ + /* * Bring an ARM processor we just gained control of (e.g. from IROM) into a * known state regarding caches/SCTLR. Completely cleans and invalidates -- cgit v1.2.3