From 66c6413c69abb7335efc4ea07f4c811c042704b6 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 19 Dec 2020 16:19:44 +0200 Subject: ACPI: Refactor ChromeOS specific ACPI GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The layout of GNVS has expectation for a fixed size array for chromeos_acpi_t. This allows us to reduce the exposure of . If chromeos_acpi_t was the last entry in struct global_nvs padding at the end is also removed. If device_nvs_t exists, place a properly sized reserve for chromeos_acpi_t in the middle. Allocation from cbmem is adjusted such that it matches exactly the OperationRegion size defined inside the ASL. Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/acpi/nvs.c | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'src/acpi/nvs.c') diff --git a/src/acpi/nvs.c b/src/acpi/nvs.c index a7915f2164..12d124f64f 100644 --- a/src/acpi/nvs.c +++ b/src/acpi/nvs.c @@ -13,15 +13,3 @@ uint32_t *gnvs_cbmc_ptr(struct global_nvs *gnvs) { return &gnvs->cbmc; } - -/* Some have no chromeos entry. */ -void *gnvs_chromeos_ptr(struct global_nvs *gnvs) -{ -#if CONFIG(BOARD_EMULATION_QEMU_X86_Q35) - return NULL; -#elif CONFIG(MAINBOARD_HAS_CHROMEOS) - return &gnvs->chromeos; -#else - return NULL; -#endif -} -- cgit v1.2.3