From fa5f9b5aff2279d6304a8b197e12714934025575 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 19 Jan 2021 14:12:19 +0200 Subject: ACPI: Declare GNVS variables globally MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is a common place where acpigen generates these, so the declarations for the OperationRegions should be centralized too. Change-Id: I772492ca9e651b60244c565d1e926dc2ad33cfd8 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49795 Reviewed-by: Raul Rangel Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/acpi/acpigen_extern.asl | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 src/acpi/acpigen_extern.asl (limited to 'src/acpi/acpigen_extern.asl') diff --git a/src/acpi/acpigen_extern.asl b/src/acpi/acpigen_extern.asl new file mode 100644 index 0000000000..73d626fbea --- /dev/null +++ b/src/acpi/acpigen_extern.asl @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * Global ACPI memory region. This region is used for passing information + * between coreboot (aka "the system bios"), ACPI, and the SMI handler. + * Since we don't know where this will end up in memory at ACPI compile time, + * we provide it runtime via NVBx and NVSx variables from acpigen. + */ + +#if CONFIG(ACPI_SOC_NVS) +External (NVB0, IntObj) +External (NVS0, IntObj) +OperationRegion (GNVS, SystemMemory, NVB0, NVS0) +#endif + +#if CONFIG(ACPI_HAS_DEVICE_NVS) +External (NVB1, IntObj) +External (NVS1, IntObj) +OperationRegion (DNVS, SystemMemory, NVB1, NVS1) +#endif -- cgit v1.2.3