From d982274a4ecc8ed6b42724d03332d06d50393109 Mon Sep 17 00:00:00 2001 From: David Milosevic Date: Fri, 22 Sep 2023 14:34:28 +0200 Subject: acpi: Add PPTT support This patch adds code to generate Processor Properties Topology Tables (PPTT) compliant to the ACPI 6.4 specification. - The 'acpi_get_pptt_topology' hook is mandatory once ACPI_PPTT is selected. Its purpose is to return a pointer to a topology tree, which describes the relationship between CPUs and caches. The hook can be provided by, for example, mainboard code. Background: We are currently working on mainboard code for qemu-sbsa and Neoverse N2. Both require a valid PPTT table. Patch was tested against the qemu-sbsa board. Change-Id: Ia119e1ba15756704668116bdbc655190ec94ff10 Signed-off-by: David Milosevic Reviewed-on: https://review.coreboot.org/c/coreboot/+/78071 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Lean Sheng Tan --- src/acpi/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'src/acpi/Kconfig') diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index cb2befbac4..cf51969e41 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -91,3 +91,17 @@ config MAX_ACPI_TABLE_SIZE_KB default 144 help Set the maximum size of all ACPI tables in KiB. + +config ACPI_PPTT + bool + depends on HAVE_ACPI_TABLES + help + Selected to build an ACPI Processor Properties Topology Table. + +config ACPI_PPTT_MAX_CACHES + int + depends on ACPI_PPTT + default 4 + help + This variable sets the maximum number of distinct caches per + topology level. Increasing this option also increases stack usage. -- cgit v1.2.3