From 18a8ba41cc748c4c85fb2d9b0314dbc87c2003c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 2 Jul 2020 21:48:38 +0300 Subject: arch/x86: Remove RELOCATABLE_RAMSTAGE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We always have it, no need to support opting-out. For PLATFORM_HAS_DRAM_CLEAR there is a dependency of ramstage located inside CBMEM, which is only true with ARCH_X86. Change-Id: I5cbf4063c69571db92de2d321c14d30c272e8098 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/43014 Reviewed-by: Aaron Durbin Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/Kconfig | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'src/Kconfig') diff --git a/src/Kconfig b/src/Kconfig index eb85cd955f..a4c2fa6010 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -270,20 +270,9 @@ config UBSAN say N because it adds a small performance penalty and may abort on code that happens to work in spite of the UB. -config RELOCATABLE_RAMSTAGE - bool - default y if ARCH_X86 - select RELOCATABLE_MODULES - help - The reloctable ramstage support allows for the ramstage to be built - as a relocatable module. The stage loader can identify a place - out of the OS way so that copying memory is unnecessary during an S3 - wake. When selecting this option the romstage is responsible for - determing a stack location to use for loading the ramstage. - choice prompt "Stage Cache for ACPI S3 resume" - default NO_STAGE_CACHE if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE + default NO_STAGE_CACHE if !HAVE_ACPI_RESUME default TSEG_STAGE_CACHE if SMM_TSEG config NO_STAGE_CACHE @@ -576,7 +565,6 @@ source "src/console/Kconfig" config HAVE_ACPI_RESUME bool default n - depends on RELOCATABLE_RAMSTAGE config DISABLE_ACPI_HIBERNATE bool -- cgit v1.2.3