From c762e231da33aeb4fbd53b15e429121d498f7b2a Mon Sep 17 00:00:00 2001 From: Caveh Jalali Date: Wed, 31 Aug 2022 16:53:59 -0700 Subject: util/spd_tools: Update LP5X support for ADL/RPL/MTL This updates the SPD utility and generated SPDs for LP5X to use memory type code 0x15 (LPDDR5X) instead of 0x13 (LPDDR5). This is done based on Intel Tech Advisory Doc ID #616599 dated May 2022, page 15. SPDs were regenerated with: "util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5" This only affects the SPDs for 2 memory parts for Intel SoCs and the only board referencing these is rex. BUG=b:242765117 TEST=inspected SPD hex dump Change-Id: Iadb4688f1cb4265dab1dc7c242f0c301d5498b83 Signed-off-by: Caveh Jalali Reviewed-on: https://review.coreboot.org/c/coreboot/+/67265 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Reka Norman Reviewed-by: Martin Roth --- spd/lp5/set-0/spd-7.hex | 2 +- spd/lp5/set-0/spd-8.hex | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'spd/lp5') diff --git a/spd/lp5/set-0/spd-7.hex b/spd/lp5/set-0/spd-7.hex index 16c789be0f..0e475cd3eb 100644 --- a/spd/lp5/set-0/spd-7.hex +++ b/spd/lp5/set-0/spd-7.hex @@ -1,4 +1,4 @@ -23 10 13 0E 16 22 95 08 00 00 00 00 02 01 00 00 +23 10 15 0E 16 22 95 08 00 00 00 00 02 01 00 00 00 00 09 00 00 00 00 00 AB 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/spd/lp5/set-0/spd-8.hex b/spd/lp5/set-0/spd-8.hex index 6a33e82c1a..b7f054f802 100644 --- a/spd/lp5/set-0/spd-8.hex +++ b/spd/lp5/set-0/spd-8.hex @@ -1,4 +1,4 @@ -23 10 13 0E 16 22 B5 08 00 00 00 00 0A 01 00 00 +23 10 15 0E 16 22 B5 08 00 00 00 00 0A 01 00 00 00 00 09 00 00 00 00 00 AB 00 90 A8 90 C0 08 60 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- cgit v1.2.3