From 67d01fd7add32d3bda59e88eb5c506ed1be6b9da Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 12 Jul 2024 17:11:05 +0000 Subject: libpayload: Unconditionally handle "CBMEM_ID_CSE_*" entries This change removes the unnecessary conditional compilation around CBMEM_ID_CSE_BP_INFO and CBMEM_ID_CSE_INFO handling in cb_parse_cbmem_entry. These CBMEM IDs are only relevant on platforms with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD enabled, and platforms without this config option won't encounter these IDs when calling cb_parse_cbmem_entry(). BUG=b:305898363 TEST=Builds and boots successfully: * google/rex0 with SOC_INTEL_CSE_LITE_SKU * google/rex64 with SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD Change-Id: Icf056f8426015e99509be5f5a67cb66468645cd9 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/83436 Tested-by: build bot (Jenkins) Reviewed-by: Maximilian Brune --- payloads/libpayload/libc/coreboot.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'payloads/libpayload/libc') diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 1d914c5b76..7873426473 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -262,14 +262,12 @@ static void cb_parse_cbmem_entry(void *ptr, struct sysinfo_t *info) case CBMEM_ID_MEM_CHIP_INFO: info->mem_chip_base = cbmem_entry->address; break; -#if CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD) case CBMEM_ID_CSE_BP_INFO: info->cse_bp_info = cbmem_entry->address; break; case CBMEM_ID_CSE_INFO: info->cse_info = cbmem_entry->address; break; -#endif default: break; } -- cgit v1.2.3