From ca52a258822c1c47d533684c5a4cbe5f2b7bd487 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Wed, 10 Oct 2018 15:31:36 -0700 Subject: libpayload: arm64: Conform to new coreboot lib_helpers.h and assume EL2 This patch adds the new, faster architectural register accessors to libpayload that were already added to coreboot in CB:27881. It also hardcodes the assumption that coreboot payloads run at EL2, which has already been hardcoded in coreboot with CB:27880 (see rationale there). This means we can drop all the read_current/write_current stuff which added a lot of unnecessary helpers to check the current exception level. This patch breaks payloads that used read_current/write_current accessors, but it seems unlikely that many payloads deal with this stuff anyway, and it should be a trivial fix (just replace them with the respective _el2 versions). Also add accessors for a couple of more registers that are required to enable debug mode while I'm here. Change-Id: Ic9dfa48411f3805747613f03611f8a134a51cc46 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/29017 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Patrick Rudolph --- .../libpayload/include/arm64/arch/lib_helpers.h | 581 ++++++++------------- 1 file changed, 224 insertions(+), 357 deletions(-) (limited to 'payloads/libpayload/include') diff --git a/payloads/libpayload/include/arm64/arch/lib_helpers.h b/payloads/libpayload/include/arm64/arch/lib_helpers.h index 99d6dcbc7d..7617f97426 100644 --- a/payloads/libpayload/include/arm64/arch/lib_helpers.h +++ b/payloads/libpayload/include/arm64/arch/lib_helpers.h @@ -1,7 +1,7 @@ /* - * This file is part of the coreboot project. + * This file is part of the libpayload project. * - * Copyright 2014 Google Inc. + * Copyright 2018 Google Inc * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -25,369 +25,241 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * - * lib_helpers.h: All library function prototypes and macros are defined in this - * file. */ #ifndef __ARCH_LIB_HELPERS_H__ #define __ARCH_LIB_HELPERS_H__ -#ifdef __ASSEMBLY__ - -/* Macro to switch to label based on current el */ -.macro switch_el xreg label1 label2 label3 - mrs \xreg, CurrentEL - /* Currently at EL1 */ - cmp \xreg, 0x4 - b.eq \label1 - /* Currently at EL2 */ - cmp \xreg, 0x8 - b.eq \label2 - /* Currently at EL3 */ - cmp \xreg, 0xc - b.eq \label3 -.endm - -/* Macro to read sysreg at current EL - xreg - reg in which read value needs to be stored - sysreg - system reg that is to be read -*/ -.macro read_current xreg sysreg - switch_el \xreg, 101f, 102f, 103f -101: - mrs \xreg, \sysreg\()_el1 - b 104f -102: - mrs \xreg, \sysreg\()_el2 - b 104f -103: - mrs \xreg, \sysreg\()_el3 - b 104f -104: -.endm - -/* Macro to write sysreg at current EL - xreg - reg from which value needs to be written - sysreg - system reg that is to be written - temp - temp reg that can be used to read current EL -*/ -.macro write_current sysreg xreg temp - switch_el \temp, 101f, 102f, 103f -101: - msr \sysreg\()_el1, \xreg - b 104f -102: - msr \sysreg\()_el2, \xreg - b 104f -103: - msr \sysreg\()_el3, \xreg - b 104f -104: -.endm - -#else - -#define EL0 0 -#define EL1 1 -#define EL2 2 -#define EL3 3 - -#define CURRENT_EL_MASK 0x3 -#define CURRENT_EL_SHIFT 2 - -#include - #define DAIF_DBG_BIT (1 << 3) #define DAIF_ABT_BIT (1 << 2) #define DAIF_IRQ_BIT (1 << 1) #define DAIF_FIQ_BIT (1 << 0) -#define SWITCH_CASE_READ(func, var, type, el) do { \ - type var = -1; \ - switch (el) { \ - case EL1: \ - var = func##_el1(); \ - break; \ - case EL2: \ - var = func##_el2(); \ - break; \ - case EL3: \ - var = func##_el3(); \ - break; \ - } \ - return var; \ - } while (0) - -#define SWITCH_CASE_WRITE(func, var, el) do { \ - switch (el) { \ - case EL1: \ - func##_el1(var); \ - break; \ - case EL2: \ - func##_el2(var); \ - break; \ - case EL3: \ - func##_el3(var); \ - break; \ - } \ - } while (0) - -#define SWITCH_CASE_TLBI(func, el) do { \ - switch (el) { \ - case EL1: \ - func##_el1(); \ - break; \ - case EL2: \ - func##_el2(); \ - break; \ - case EL3: \ - func##_el3(); \ - break; \ - } \ - } while (0) - -/* PSTATE and special purpose register access functions */ -uint32_t raw_read_current_el(void); -uint32_t get_current_el(void); -uint32_t raw_read_daif(void); -void raw_write_daif(uint32_t daif); -void enable_debug_exceptions(void); -void enable_serror_exceptions(void); -void enable_irq(void); -void enable_fiq(void); -void disable_debug_exceptions(void); -void disable_serror_exceptions(void); -void disable_irq(void); -void disable_fiq(void); -uint64_t raw_read_dlr_el0(void); -void raw_write_dlr_el0(uint64_t dlr_el0); -uint64_t raw_read_dspsr_el0(void); -void raw_write_dspsr_el0(uint64_t dspsr_el0); -uint64_t raw_read_elr_el1(void); -void raw_write_elr_el1(uint64_t elr_el1); -uint64_t raw_read_elr_el2(void); -void raw_write_elr_el2(uint64_t elr_el2); -uint64_t raw_read_elr_el3(void); -void raw_write_elr_el3(uint64_t elr_el3); -uint64_t raw_read_elr_current(void); -void raw_write_elr_current(uint64_t elr); -uint64_t raw_read_elr(uint32_t el); -void raw_write_elr(uint64_t elr, uint32_t el); -uint32_t raw_read_fpcr(void); -void raw_write_fpcr(uint32_t fpcr); -uint32_t raw_read_fpsr(void); -void raw_write_fpsr(uint32_t fpsr); -uint32_t raw_read_nzcv(void); -void raw_write_nzcv(uint32_t nzcv); -uint64_t raw_read_sp_el0(void); -void raw_write_sp_el0(uint64_t sp_el0); -uint64_t raw_read_sp_el1(void); -void raw_write_sp_el1(uint64_t sp_el1); -uint64_t raw_read_sp_el2(void); -void raw_write_sp_el2(uint64_t sp_el2); -uint32_t raw_read_spsel(void); -void raw_write_spsel(uint32_t spsel); -uint64_t raw_read_sp_el3(void); -void raw_write_sp_el3(uint64_t sp_el3); -uint32_t raw_read_spsr_abt(void); -void raw_write_spsr_abt(uint32_t spsr_abt); -uint32_t raw_read_spsr_el1(void); -void raw_write_spsr_el1(uint32_t spsr_el1); -uint32_t raw_read_spsr_el2(void); -void raw_write_spsr_el2(uint32_t spsr_el2); -uint32_t raw_read_spsr_el3(void); -void raw_write_spsr_el3(uint32_t spsr_el3); -uint32_t raw_read_spsr_current(void); -void raw_write_spsr_current(uint32_t spsr); -uint32_t raw_read_spsr(uint32_t el); -void raw_write_spsr(uint32_t spsr, uint32_t el); -uint32_t raw_read_spsr_fiq(void); -void raw_write_spsr_fiq(uint32_t spsr_fiq); -uint32_t raw_read_spsr_irq(void); -void raw_write_spsr_irq(uint32_t spsr_irq); -uint32_t raw_read_spsr_und(void); -void raw_write_spsr_und(uint32_t spsr_und); - -/* System control register access */ -uint32_t raw_read_actlr_el1(void); -void raw_write_actlr_el1(uint32_t actlr_el1); -uint32_t raw_read_actlr_el2(void); -void raw_write_actlr_el2(uint32_t actlr_el2); -uint32_t raw_read_actlr_el3(void); -void raw_write_actlr_el3(uint32_t actlr_el3); -uint32_t raw_read_actlr_current(void); -void raw_write_actlr_current(uint32_t actlr); -uint32_t raw_read_actlr(uint32_t el); -void raw_write_actlr(uint32_t actlr, uint32_t el); -uint32_t raw_read_afsr0_el1(void); -void raw_write_afsr0_el1(uint32_t afsr0_el1); -uint32_t raw_read_afsr0_el2(void); -void raw_write_afsr0_el2(uint32_t afsr0_el2); -uint32_t raw_read_afsr0_el3(void); -void raw_write_afsr0_el3(uint32_t afsr0_el3); -uint32_t raw_read_afsr0_current(void); -void raw_write_afsr0_current(uint32_t afsr0); -uint32_t raw_read_afsr0(uint32_t el); -void raw_write_afsr0(uint32_t afsr0, uint32_t el); -uint32_t raw_read_afsr1_el1(void); -void raw_write_afsr1_el1(uint32_t afsr1_el1); -uint32_t raw_read_afsr1_el2(void); -void raw_write_afsr1_el2(uint32_t afsr1_el2); -uint32_t raw_read_afsr1_el3(void); -void raw_write_afsr1_el3(uint32_t afsr1_el3); -uint32_t raw_read_afsr1_current(void); -void raw_write_afsr1_current(uint32_t afsr1); -uint32_t raw_read_afsr1(uint32_t el); -void raw_write_afsr1(uint32_t afsr1, uint32_t el); -uint32_t raw_read_aidr_el1(void); -uint64_t raw_read_amair_el1(void); -void raw_write_amair_el1(uint64_t amair_el1); -uint64_t raw_read_amair_el2(void); -void raw_write_amair_el2(uint64_t amair_el2); -uint64_t raw_read_amair_el3(void); -void raw_write_amair_el3(uint64_t amair_el3); -uint64_t raw_read_amair_current(void); -void raw_write_amair_current(uint64_t amair); -uint64_t raw_read_amair(uint32_t el); -void raw_write_amair(uint64_t amair, uint32_t el); -uint32_t raw_read_ccsidr_el1(void); -uint32_t raw_read_clidr_el1(void); -uint32_t raw_read_cpacr_el1(void); -void raw_write_cpacr_el1(uint32_t cpacr_el1); -uint32_t raw_read_cptr_el2(void); -void raw_write_cptr_el2(uint32_t cptr_el2); -uint32_t raw_read_cptr_el3(void); -void raw_write_cptr_el3(uint32_t cptr_el3); -uint32_t raw_read_csselr_el1(void); -void raw_write_csselr_el1(uint32_t csselr_el1); -uint32_t raw_read_ctr_el0(void); -uint32_t raw_read_esr_el1(void); -void raw_write_esr_el1(uint32_t esr_el1); -uint32_t raw_read_esr_el2(void); -void raw_write_esr_el2(uint32_t esr_el2); -uint32_t raw_read_esr_el3(void); -void raw_write_esr_el3(uint32_t esr_el3); -uint32_t raw_read_esr_current(void); -void raw_write_esr_current(uint32_t esr); -uint32_t raw_read_esr(uint32_t el); -void raw_write_esr(uint32_t esr, uint32_t el); -uint64_t raw_read_far_el1(void); -void raw_write_far_el1(uint64_t far_el1); -uint64_t raw_read_far_el2(void); -void raw_write_far_el2(uint64_t far_el2); -uint64_t raw_read_far_el3(void); -void raw_write_far_el3(uint64_t far_el3); -uint64_t raw_read_far_current(void); -void raw_write_far_current(uint64_t far); -uint64_t raw_read_far(uint32_t el); -void raw_write_far(uint64_t far, uint32_t el); -uint64_t raw_read_hcr_el2(void); -void raw_write_hcr_el2(uint64_t hcr_el2); -uint64_t raw_read_aa64pfr0_el1(void); -uint64_t raw_read_mair_el1(void); -void raw_write_mair_el1(uint64_t mair_el1); -uint64_t raw_read_mair_el2(void); -void raw_write_mair_el2(uint64_t mair_el2); -uint64_t raw_read_mair_el3(void); -void raw_write_mair_el3(uint64_t mair_el3); -uint64_t raw_read_mair_current(void); -void raw_write_mair_current(uint64_t mair); -uint64_t raw_read_mair(uint32_t el); -void raw_write_mair(uint64_t mair, uint32_t el); -uint64_t raw_read_mpidr_el1(void); -uint32_t raw_read_rmr_el1(void); -void raw_write_rmr_el1(uint32_t rmr_el1); -uint32_t raw_read_rmr_el2(void); -void raw_write_rmr_el2(uint32_t rmr_el2); -uint32_t raw_read_rmr_el3(void); -void raw_write_rmr_el3(uint32_t rmr_el3); -uint32_t raw_read_rmr_current(void); -void raw_write_rmr_current(uint32_t rmr); -uint32_t raw_read_rmr(uint32_t el); -void raw_write_rmr(uint32_t rmr, uint32_t el); -uint64_t raw_read_rvbar_el1(void); -void raw_write_rvbar_el1(uint64_t rvbar_el1); -uint64_t raw_read_rvbar_el2(void); -void raw_write_rvbar_el2(uint64_t rvbar_el2); -uint64_t raw_read_rvbar_el3(void); -void raw_write_rvbar_el3(uint64_t rvbar_el3); -uint64_t raw_read_rvbar_current(void); -void raw_write_rvbar_current(uint64_t rvbar); -uint64_t raw_read_rvbar(uint32_t el); -void raw_write_rvbar(uint64_t rvbar, uint32_t el); -uint32_t raw_read_scr_el3(void); -void raw_write_scr_el3(uint32_t scr_el3); -uint32_t raw_read_sctlr_el1(void); -void raw_write_sctlr_el1(uint32_t sctlr_el1); -uint32_t raw_read_sctlr_el2(void); -void raw_write_sctlr_el2(uint32_t sctlr_el2); -uint32_t raw_read_sctlr_el3(void); -void raw_write_sctlr_el3(uint32_t sctlr_el3); -uint32_t raw_read_sctlr_current(void); -void raw_write_sctlr_current(uint32_t sctlr); -uint32_t raw_read_sctlr(uint32_t el); -void raw_write_sctlr(uint32_t sctlr, uint32_t el); -uint64_t raw_read_tcr_el1(void); -void raw_write_tcr_el1(uint64_t tcr_el1); -uint32_t raw_read_tcr_el2(void); -void raw_write_tcr_el2(uint32_t tcr_el2); -uint32_t raw_read_tcr_el3(void); -void raw_write_tcr_el3(uint32_t tcr_el3); -uint64_t raw_read_tcr_current(void); -void raw_write_tcr_current(uint64_t tcr); -uint64_t raw_read_tcr(uint32_t el); -void raw_write_tcr(uint64_t tcr, uint32_t el); -uint64_t raw_read_ttbr0_el1(void); -void raw_write_ttbr0_el1(uint64_t ttbr0_el1); -uint64_t raw_read_ttbr0_el2(void); -void raw_write_ttbr0_el2(uint64_t ttbr0_el2); -uint64_t raw_read_ttbr0_el3(void); -void raw_write_ttbr0_el3(uint64_t ttbr0_el3); -uint64_t raw_read_ttbr0_current(void); -void raw_write_ttbr0_current(uint64_t ttbr0); -uint64_t raw_read_ttbr0(uint32_t el); -void raw_write_ttbr0(uint64_t ttbr0, uint32_t el); -uint64_t raw_read_ttbr1_el1(void); -void raw_write_ttbr1_el1(uint64_t ttbr1_el1); -uint64_t raw_read_vbar_el1(void); -void raw_write_vbar_el1(uint64_t vbar_el1); -uint64_t raw_read_vbar_el2(void); -void raw_write_vbar_el2(uint64_t vbar_el2); -uint64_t raw_read_vbar_el3(void); -void raw_write_vbar_el3(uint64_t vbar_el3); -uint64_t raw_read_vbar_current(void); -void raw_write_vbar_current(uint64_t vbar); -uint64_t raw_read_vbar(uint32_t el); -void raw_write_vbar(uint64_t vbar, uint32_t el); -uint64_t raw_read_cntpct_el0(void); -uint32_t raw_read_cntfrq_el0(void); +#include + +#define MAKE_REGISTER_ACCESSORS(reg) \ + static inline uint64_t raw_read_##reg(void) \ + { \ + uint64_t value; \ + __asm__ __volatile__("mrs %0, " #reg "\n\t" \ + : "=r" (value) : : "memory"); \ + return value; \ + } \ + static inline void raw_write_##reg(uint64_t value) \ + { \ + __asm__ __volatile__("msr " #reg ", %0\n\t" \ + : : "r" (value) : "memory"); \ + } + +#define MAKE_REGISTER_ACCESSORS_EL12(reg) \ + MAKE_REGISTER_ACCESSORS(reg##_el1) \ + MAKE_REGISTER_ACCESSORS(reg##_el2) + +/* Architectural register accessors */ +MAKE_REGISTER_ACCESSORS_EL12(actlr) +MAKE_REGISTER_ACCESSORS_EL12(afsr0) +MAKE_REGISTER_ACCESSORS_EL12(afsr1) +MAKE_REGISTER_ACCESSORS(aidr_el1) +MAKE_REGISTER_ACCESSORS_EL12(amair) +MAKE_REGISTER_ACCESSORS(ccsidr_el1) +MAKE_REGISTER_ACCESSORS(clidr_el1) +MAKE_REGISTER_ACCESSORS(cntfrq_el0) +MAKE_REGISTER_ACCESSORS(cnthctl_el2) +MAKE_REGISTER_ACCESSORS(cnthp_ctl_el2) +MAKE_REGISTER_ACCESSORS(cnthp_cval_el2) +MAKE_REGISTER_ACCESSORS(cnthp_tval_el2) +MAKE_REGISTER_ACCESSORS(cntkctl_el1) +MAKE_REGISTER_ACCESSORS(cntp_ctl_el0) +MAKE_REGISTER_ACCESSORS(cntp_cval_el0) +MAKE_REGISTER_ACCESSORS(cntp_tval_el0) +MAKE_REGISTER_ACCESSORS(cntpct_el0) +MAKE_REGISTER_ACCESSORS(cntps_ctl_el1) +MAKE_REGISTER_ACCESSORS(cntps_cval_el1) +MAKE_REGISTER_ACCESSORS(cntps_tval_el1) +MAKE_REGISTER_ACCESSORS(cntv_ctl_el0) +MAKE_REGISTER_ACCESSORS(cntv_cval_el0) +MAKE_REGISTER_ACCESSORS(cntv_tval_el0) +MAKE_REGISTER_ACCESSORS(cntvct_el0) +MAKE_REGISTER_ACCESSORS(cntvoff_el2) +MAKE_REGISTER_ACCESSORS(contextidr_el1) +MAKE_REGISTER_ACCESSORS(cpacr_el1) +MAKE_REGISTER_ACCESSORS(cptr_el2) +MAKE_REGISTER_ACCESSORS(csselr_el1) +MAKE_REGISTER_ACCESSORS(ctr_el0) +MAKE_REGISTER_ACCESSORS(currentel) +MAKE_REGISTER_ACCESSORS(daif) +MAKE_REGISTER_ACCESSORS(dczid_el0) +MAKE_REGISTER_ACCESSORS_EL12(elr) +MAKE_REGISTER_ACCESSORS_EL12(esr) +MAKE_REGISTER_ACCESSORS_EL12(far) +MAKE_REGISTER_ACCESSORS(fpcr) +MAKE_REGISTER_ACCESSORS(fpsr) +MAKE_REGISTER_ACCESSORS(hacr_el2) +MAKE_REGISTER_ACCESSORS(hcr_el2) +MAKE_REGISTER_ACCESSORS(hpfar_el2) +MAKE_REGISTER_ACCESSORS(hstr_el2) +MAKE_REGISTER_ACCESSORS(isr_el1) +MAKE_REGISTER_ACCESSORS_EL12(mair) +MAKE_REGISTER_ACCESSORS_EL12(mdcr) +MAKE_REGISTER_ACCESSORS(mdscr_el1) +MAKE_REGISTER_ACCESSORS(midr_el1) +MAKE_REGISTER_ACCESSORS(mpidr_el1) +MAKE_REGISTER_ACCESSORS(nzcv) +MAKE_REGISTER_ACCESSORS(oslar_el1) +MAKE_REGISTER_ACCESSORS(oslsr_el1) +MAKE_REGISTER_ACCESSORS(par_el1) +MAKE_REGISTER_ACCESSORS(revdir_el1) +MAKE_REGISTER_ACCESSORS_EL12(rmr) +MAKE_REGISTER_ACCESSORS_EL12(rvbar) +MAKE_REGISTER_ACCESSORS_EL12(sctlr) +MAKE_REGISTER_ACCESSORS(sp_el0) +MAKE_REGISTER_ACCESSORS(sp_el1) +MAKE_REGISTER_ACCESSORS(spsel) +MAKE_REGISTER_ACCESSORS_EL12(spsr) +MAKE_REGISTER_ACCESSORS(spsr_abt) +MAKE_REGISTER_ACCESSORS(spsr_fiq) +MAKE_REGISTER_ACCESSORS(spsr_irq) +MAKE_REGISTER_ACCESSORS(spsr_und) +MAKE_REGISTER_ACCESSORS_EL12(tcr) +MAKE_REGISTER_ACCESSORS_EL12(tpidr) +MAKE_REGISTER_ACCESSORS_EL12(ttbr0) +MAKE_REGISTER_ACCESSORS(ttbr1_el1) +MAKE_REGISTER_ACCESSORS_EL12(vbar) +MAKE_REGISTER_ACCESSORS(vmpidr_el2) +MAKE_REGISTER_ACCESSORS(vpidr_el2) +MAKE_REGISTER_ACCESSORS(vtcr_el2) +MAKE_REGISTER_ACCESSORS(vttbr_el2) + +/* Special DAIF accessor functions */ +static inline void enable_debug_exceptions(void) +{ + __asm__ __volatile__("msr DAIFClr, %0\n\t" + : : "i" (DAIF_DBG_BIT) : "memory"); +} + +static inline void enable_serror_exceptions(void) +{ + __asm__ __volatile__("msr DAIFClr, %0\n\t" + : : "i" (DAIF_ABT_BIT) : "memory"); +} + +static inline void enable_irq(void) +{ + __asm__ __volatile__("msr DAIFClr, %0\n\t" + : : "i" (DAIF_IRQ_BIT) : "memory"); +} + +static inline void enable_fiq(void) +{ + __asm__ __volatile__("msr DAIFClr, %0\n\t" + : : "i" (DAIF_FIQ_BIT) : "memory"); +} + +static inline void disable_debug_exceptions(void) +{ + __asm__ __volatile__("msr DAIFSet, %0\n\t" + : : "i" (DAIF_DBG_BIT) : "memory"); +} + +static inline void disable_serror_exceptions(void) +{ + __asm__ __volatile__("msr DAIFSet, %0\n\t" + : : "i" (DAIF_ABT_BIT) : "memory"); +} + +static inline void disable_irq(void) +{ + __asm__ __volatile__("msr DAIFSet, %0\n\t" + : : "i" (DAIF_IRQ_BIT) : "memory"); +} + +static inline void disable_fiq(void) +{ + __asm__ __volatile__("msr DAIFSet, %0\n\t" + : : "i" (DAIF_FIQ_BIT) : "memory"); +} /* Cache maintenance system instructions */ -void dccisw(uint64_t cisw); -void dccivac(uint64_t civac); -void dccsw(uint64_t csw); -void dccvac(uint64_t cvac); -void dccvau(uint64_t cvau); -void dcisw(uint64_t isw); -void dcivac(uint64_t ivac); -void dczva(uint64_t zva); -void iciallu(void); -void icialluis(void); -void icivau(uint64_t ivau); +static inline void dccisw(uint64_t cisw) +{ + __asm__ __volatile__("dc cisw, %0\n\t" : : "r" (cisw) : "memory"); +} + +static inline void dccivac(uint64_t civac) +{ + __asm__ __volatile__("dc civac, %0\n\t" : : "r" (civac) : "memory"); +} + +static inline void dccsw(uint64_t csw) +{ + __asm__ __volatile__("dc csw, %0\n\t" : : "r" (csw) : "memory"); +} + +static inline void dccvac(uint64_t cvac) +{ + __asm__ __volatile__("dc cvac, %0\n\t" : : "r" (cvac) : "memory"); +} + +static inline void dccvau(uint64_t cvau) +{ + __asm__ __volatile__("dc cvau, %0\n\t" : : "r" (cvau) : "memory"); +} + +static inline void dcisw(uint64_t isw) +{ + __asm__ __volatile__("dc isw, %0\n\t" : : "r" (isw) : "memory"); +} + +static inline void dcivac(uint64_t ivac) +{ + __asm__ __volatile__("dc ivac, %0\n\t" : : "r" (ivac) : "memory"); +} + +static inline void dczva(uint64_t zva) +{ + __asm__ __volatile__("dc zva, %0\n\t" : : "r" (zva) : "memory"); +} + +static inline void iciallu(void) +{ + __asm__ __volatile__("ic iallu\n\t" : : : "memory"); +} + +static inline void icialluis(void) +{ + __asm__ __volatile__("ic ialluis\n\t" : : : "memory"); +} + +static inline void icivau(uint64_t ivau) +{ + __asm__ __volatile__("ic ivau, %0\n\t" : : "r" (ivau) : "memory"); +} /* TLB maintenance instructions */ -void tlbiall_el1(void); -void tlbiall_el2(void); -void tlbiall_el3(void); -void tlbiall_current(void); -void tlbiall(uint32_t el); -void tlbiallis_el1(void); -void tlbiallis_el2(void); -void tlbiallis_el3(void); -void tlbiallis_current(void); -void tlbiallis(uint32_t el); -void tlbivaa_el1(uint64_t va); +static inline void tlbiall_el1(void) +{ + __asm__ __volatile__("tlbi alle1\n\t" : : : "memory"); +} + +static inline void tlbiall_el2(void) +{ + __asm__ __volatile__("tlbi alle2\n\t" : : : "memory"); +} + +static inline void tlbiallis_el1(void) +{ + __asm__ __volatile__("tlbi alle1is\n\t" : : : "memory"); +} + +static inline void tlbiallis_el2(void) +{ + __asm__ __volatile__("tlbi alle2is\n\t" : : : "memory"); +} + +static inline void tlbivaa_el1(uint64_t va) +{ + __asm__ __volatile__("tlbi vaae1, %0\n\t" : : "r" (va) : "memory"); +} /* Memory barrier */ /* data memory barrier */ @@ -401,9 +273,4 @@ void tlbivaa_el1(uint64_t va); #define dsb() dsb_opt(sy) #define isb() isb_opt() -/* Clock */ -void set_cntfrq(uint32_t freq); - -#endif // __ASSEMBLY__ - -#endif //__ARCH_LIB_HELPERS_H__ +#endif /* __ARCH_LIB_HELPERS_H__ */ -- cgit v1.2.3