From 8e0ffe2088ebc6557bf4e08377605e991d375e06 Mon Sep 17 00:00:00 2001 From: Varadarajan Narayanan Date: Thu, 17 Mar 2016 14:43:35 +0530 Subject: libpayload: xhci: Set MPS based on speed BUG=chrome-os-partner:49249 TEST=Compiles and boots and detect USB storage BRANCH=none Change-Id: I9007399e1f785e6f1d2258225e3f7cc602053aed Signed-off-by: Patrick Georgi Original-Commit-Id: 1db43f53973d2124e41186777caa829aa346ace3 Original-Change-Id: I943d19a3a7d785bd075073b57ba6388662d7df90 Original-Signed-off-by: Varadarajan Narayanan Original-Reviewed-on: https://chromium-review.googlesource.com/333311 Original-Commit-Ready: David Hendricks Original-Reviewed-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/14659 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- payloads/libpayload/drivers/usb/usb.c | 14 ++++++++++++++ payloads/libpayload/drivers/usb/xhci_devconf.c | 2 +- 2 files changed, 15 insertions(+), 1 deletion(-) (limited to 'payloads/libpayload/drivers') diff --git a/payloads/libpayload/drivers/usb/usb.c b/payloads/libpayload/drivers/usb/usb.c index e87e397061..bfb697d619 100644 --- a/payloads/libpayload/drivers/usb/usb.c +++ b/payloads/libpayload/drivers/usb/usb.c @@ -275,6 +275,20 @@ usb_decode_mps0(usb_speed speed, u8 bMaxPacketSize0) } } +int speed_to_default_mps(usb_speed speed) +{ + switch (speed) { + case LOW_SPEED: + return 8; + case FULL_SPEED: + case HIGH_SPEED: + return 64; + case SUPER_SPEED: + default: + return 512; + } +} + /* Normalize bInterval to log2 of microframes */ static int usb_decode_interval(usb_speed speed, const endpoint_type type, const unsigned char bInterval) diff --git a/payloads/libpayload/drivers/usb/xhci_devconf.c b/payloads/libpayload/drivers/usb/xhci_devconf.c index ead130e7d1..48d928c380 100644 --- a/payloads/libpayload/drivers/usb/xhci_devconf.c +++ b/payloads/libpayload/drivers/usb/xhci_devconf.c @@ -185,7 +185,7 @@ xhci_set_address (hci_t *controller, usb_speed speed, int hubport, int hubaddr) ic->dev.ep0->tr_dq_high = 0; EC_SET(TYPE, ic->dev.ep0, EP_CONTROL); EC_SET(AVRTRB, ic->dev.ep0, 8); - EC_SET(MPS, ic->dev.ep0, 8); + EC_SET(MPS, ic->dev.ep0, speed_to_default_mps(speed)); EC_SET(CERR, ic->dev.ep0, 3); EC_SET(DCS, ic->dev.ep0, 1); -- cgit v1.2.3