From c10e7f2de91f8365784756b67c8f4cd99ba2e56b Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Thu, 4 Sep 2014 15:03:48 -0700 Subject: libpayload arm64: Add functions for {read/write}_tcr_current BUG=chrome-os-partner:31634 BRANCH=None TEST=Compiles successfully Change-Id: I7a3dc9420fa85fa8f7ab70f0f55b200f432d3240 Signed-off-by: Patrick Georgi Original-Commit-Id: 20c89d5df653ad65ad6d8ecc4c26de4c5e447564 Original-Change-Id: Ibd801ef1d777d306f35dde3c2b120af41d8f27e4 Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/216819 Original-Reviewed-by: Aaron Durbin Original-Tested-by: Furquan Shaikh Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/8786 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- payloads/libpayload/arch/arm64/lib/sysctrl.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'payloads/libpayload/arch/arm64/lib/sysctrl.c') diff --git a/payloads/libpayload/arch/arm64/lib/sysctrl.c b/payloads/libpayload/arch/arm64/lib/sysctrl.c index 7e06e29658..13c9309f08 100644 --- a/payloads/libpayload/arch/arm64/lib/sysctrl.c +++ b/payloads/libpayload/arch/arm64/lib/sysctrl.c @@ -757,6 +757,16 @@ void raw_write_tcr_el3(uint32_t tcr_el3) __asm__ __volatile__("msr TCR_EL3, %0\n\t" : : "r" (tcr_el3) : "memory"); } +uint64_t raw_read_tcr_current(void) +{ + SWITCH_CASE_READ(raw_read_tcr, tcr, uint64_t); +} + +void raw_write_tcr_current(uint64_t tcr) +{ + SWITCH_CASE_WRITE(raw_write_tcr, tcr); +} + /* TTBR0 */ uint64_t raw_read_ttbr0_el1(void) { -- cgit v1.2.3