From aced1f02cf24be5a56a97b75c98c861e57e14595 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 18 Apr 2021 23:57:21 +0200 Subject: sb/intel/lynxpoint: Add SerialIO UART console support Derived from Broadwell and adapted to follow what soc/intel does. Note that SERIALIO_UART_CONSOLE is meant to be selected from the mainboards which expose a SerialIO UART. UART_FOR_CONSOLE also needs to be set in mainboard Kconfig accordingly. It is possible that some of the UART configuration steps in bootblock are unnecessary. However, some of the steps turn off power management features and others are undocumented: omitting them could cause weird issues. Finally, add a config file to ensure the code gets build-tested. Tested on out-of-tree Compal LA-A992P, SerialIO UART 0 can be used to receive coreboot and SeaBIOS logs. Change-Id: Ifb3460dd50ed03421a38f03c80f91ae9fd604022 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52489 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- configs/config.google_panther.pch_serialio_uart | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 configs/config.google_panther.pch_serialio_uart (limited to 'configs') diff --git a/configs/config.google_panther.pch_serialio_uart b/configs/config.google_panther.pch_serialio_uart new file mode 100644 index 0000000000..5f7f4c7745 --- /dev/null +++ b/configs/config.google_panther.pch_serialio_uart @@ -0,0 +1,5 @@ +# Configuration used to build-test Lynx Point SerialIO UART console code. +CONFIG_VENDOR_GOOGLE=y +CONFIG_BOARD_GOOGLE_PANTHER=y +CONFIG_SERIALIO_UART_CONSOLE=y +# CONFIG_DRIVERS_UART_8250IO is not set -- cgit v1.2.3