From 5cd81730ecef18690f92d193b0381c103a5b3d9b Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Thu, 11 Mar 2004 15:01:31 +0000 Subject: - Moved hlt() to it's own header. - Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- NEWS | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'NEWS') diff --git a/NEWS b/NEWS index d122514043..9bdaa1db63 100644 --- a/NEWS +++ b/NEWS @@ -1,3 +1,14 @@ +- 1.1.6 + - pnp/superio devices are now handled cleanly with very little code + - Initial support for finding x86 BIST errors + - static resource assignments can now be specified in Config.lb + - special VGA I/O decode now should work + - added generic PCI error reporting enables + - build_opt_tbl now generates a header that allows cmos settings to + be read from romcc compiled code. + - split IORESOURCE_SET into IORESOURCE_ASSIGNED and IORESOURCE_STORED + - romcc now gracesfully handles function pointers instead of dying mysteriously + - First regression test in amdk8/raminit_test - 1.1.5 - O2, enums, and switch statements work in romcc - Support for compiling romcc on non x86 platforms -- cgit v1.2.3