From ffbc3b5f5fb0bdf57b6d5e3808e55e761241d8ba Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Thu, 6 Jun 2019 15:45:51 +0200 Subject: drivers/ipmi: Add chip ops * Add chips ops for IPMI KCS. * Get IPMI version over KCS. * Generates ACPI SPMI table for IPMI KCS. * Generates SMBIOS type 38 for IPMI KCS. * Generates ACPI SPMI device for IPMI KCS on LPC device. * Add documentation To use this driver on BMC that support KCS on I/O: 1. Add an entry to the devicetree.cb: chip drivers/ipmi device pnp ca2.0 on end # IPMI KCS end 2. Select IPMI_KCS in Kconfig. 3. (Optional) enable LPC I/O decode for the given address. Tested on Wedge100s. Change-Id: I73cbd2058ccdc5395baf244f31345a85eb0047d7 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/33255 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- Documentation/drivers/index.md | 7 ++++++ Documentation/drivers/ipmi_kcs.md | 47 +++++++++++++++++++++++++++++++++++++++ Documentation/index.md | 1 + 3 files changed, 55 insertions(+) create mode 100644 Documentation/drivers/index.md create mode 100644 Documentation/drivers/ipmi_kcs.md (limited to 'Documentation') diff --git a/Documentation/drivers/index.md b/Documentation/drivers/index.md new file mode 100644 index 0000000000..642ae1a5f3 --- /dev/null +++ b/Documentation/drivers/index.md @@ -0,0 +1,7 @@ +# Platform indenpendend drivers documentation + +The drivers can be found in `src/drivers`. They are intended for onboard +and plugin devices, significantly reducing integration complexity and +they allow to easily reuse existing code accross platforms. + +* [IPMI KCS](ipmi_kcs.md) diff --git a/Documentation/drivers/ipmi_kcs.md b/Documentation/drivers/ipmi_kcs.md new file mode 100644 index 0000000000..f6f0fb986a --- /dev/null +++ b/Documentation/drivers/ipmi_kcs.md @@ -0,0 +1,47 @@ +# IPMI KCS driver + +The driver can be found in `src/drivers/ipmi/`. It works with BMC that provide +a KCS I/O interface as specified in the [IPMI] standard. + +The driver detects the IPMI version, reserves the I/O space in coreboot's +resource allocator and writes the required ACPI and SMBIOS tables. + +## For developers + +To use the driver, select the `IPMI_KCS` Kconfig and add the following PNP +device under the LPC bridge device (in example for the KCS at 0xca2): + +``` + chip drivers/ipmi + device pnp ca2.0 on end # IPMI KCS + end +``` + +**Note:** The I/O base address needs to be aligned to 2. + +The following registers can be set: + +* `have_nv_storage` + * Boolean + * If true `nv_storage_device_address` will be added to SMBIOS type 38. +* `nv_storage_device_address` + * Integer + * The NV storage address as defined in SMBIOS spec for type 38. +* `bmc_i2c_address` + * Integer + * The i2c address of the BMC. zero if not applicable. +* `have_apic` + * Boolean + * If true the `apic_interrupt` will be added to SPMI table. +* `apic_interrupt` + * Integer + * The APIC interrupt used to notify about a change on the KCS. +* `have_gpe` + * Boolean + * If true the `gpe_interrupt` will be added to SPMI table. +* `gpe_interrupt` + * Integer + * The bit in GPE (SCI) used to notify about a change on the KCS. + + +[IPMI]: https://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/ipmi-second-gen-interface-spec-v2-rev1-1.pdf diff --git a/Documentation/index.md b/Documentation/index.md index 76faffa497..a2c2878ddb 100644 --- a/Documentation/index.md +++ b/Documentation/index.md @@ -175,6 +175,7 @@ Contents: * [Native Graphics Initialization with libgfxinit](gfx/libgfxinit.md) * [Display panel-specific documentation](gfx/display-panel.md) * [Architecture-specific documentation](arch/index.md) +* [Platform independend drivers documentation](drivers/index.md) * [Northbridge-specific documentation](northbridge/index.md) * [System on Chip-specific documentation](soc/index.md) * [Mainboard-specific documentation](mainboard/index.md) -- cgit v1.2.3