From 6dc9d0352e9c2dafb46c8c827d07cfdba2d744dd Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sun, 16 Feb 2020 16:22:52 +0100 Subject: treewide: capitalize 'BIOS' Also replace 'BIOS' by coreboot when the image is 'coreboot.rom'. Change-Id: I8303b7baa9671f19a036a59775026ffd63c85273 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/38932 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- Documentation/releases/coreboot-4.8.1-relnotes.md | 2 +- Documentation/soc/intel/fit.md | 2 +- Documentation/tutorial/part1.md | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'Documentation') diff --git a/Documentation/releases/coreboot-4.8.1-relnotes.md b/Documentation/releases/coreboot-4.8.1-relnotes.md index 8a6ab964e8..e2462365ac 100644 --- a/Documentation/releases/coreboot-4.8.1-relnotes.md +++ b/Documentation/releases/coreboot-4.8.1-relnotes.md @@ -40,7 +40,7 @@ possible Lenovo mainboards ----------------- -* Started integration of VBT (Video Bios Table) binary files to +* Started integration of VBT (Video BIOS Table) binary files to support native graphics initialisation Internal changes diff --git a/Documentation/soc/intel/fit.md b/Documentation/soc/intel/fit.md index 8b638f0433..553fef3c16 100644 --- a/Documentation/soc/intel/fit.md +++ b/Documentation/soc/intel/fit.md @@ -57,4 +57,4 @@ execution of the IA32 reset vector happens. ## References * [Intel TXT LAB handout](https://downloadmirror.intel.com/18931/eng/Intel%20TXT%20LAB%20Handout.pdf) -* [FIT bios specification](https://www.intel.com/content/dam/www/public/us/en/documents/guides/fit-bios-specification.pdf) +* [FIT BIOS specification](https://www.intel.com/content/dam/www/public/us/en/documents/guides/fit-bios-specification.pdf) diff --git a/Documentation/tutorial/part1.md b/Documentation/tutorial/part1.md index 0c7ef67cbb..7e3da01572 100644 --- a/Documentation/tutorial/part1.md +++ b/Documentation/tutorial/part1.md @@ -173,7 +173,7 @@ Here's the command line instruction broken down: This starts the QEMU emulator with the i440FX host PCI bridge and PIIX3 PCI to ISA bridge. * `-bios build/coreboot.rom` -Use the bios rom image that we just built. If this flag is left out, the +Use the coreboot rom image that we just built. If this flag is left out, the standard SeaBIOS image that comes with QEMU is used. * `-serial stdio` Send the serial output to the console. This allows you to view the coreboot -- cgit v1.2.3