From 380e1676802825fa0b9429c3438f366d413f1297 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Sun, 31 Jan 2016 10:49:35 -0800 Subject: Documentation: Add x86 bootblock support Document what is involved with adding the bootblock support. TEST=None Change-Id: I6c8cc38e1b9346b4962588b33ca5e4ab8eac24c3 Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/13441 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- Documentation/Intel/SoC/soc.html | 96 ++++++++++++++++++++++++++++++++++++ Documentation/Intel/development.html | 1 + 2 files changed, 97 insertions(+) (limited to 'Documentation') diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 30821dcd9c..7a712d8f23 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -17,6 +17,7 @@
  • SoC Required Files
  • Start Booting
  • Early Debug
    • +
  • Bootblock
    • @@ -99,6 +100,101 @@ mv build/coreboot.rom.new build/coreboot.rom +
    +

    Bootblock

    +

    + Implement the bootblock using the following steps: +

    +
      +
    1. Create the directory as src/soc/<Vendor>/<Chip Family>/bootblock
      2. +
    2. Add the timestamp.inc file which initializes the floating point registers and saves + the initial timestamp. +
      3. +
    3. Add the bootblock.c file which: +
        +
      1. Enables memory-mapped PCI config access
        2. +
      2. Updates the microcode by calling intel_update_microcode_from_cbfs
        3. +
      3. Enable ROM caching
        4. +
      +
      4. +
    4. Edit the src/soc/<Vendor>/<Chip Family>/Kconfig file +
        +
      1. Add the BOOTBLOCK_CPU_INIT value to point to the bootblock.c file
        2. +
      2. Add the CHIPSET_BOOTBLOCK_INCLUDE value to point to the timestamp.inc file
        3. +
      +
      5. +
    5. Edit the src/soc/<Vendor>/<Chip Family>/Makefile.inc file +
        +
      1. Add the bootblock subdirectory
        2. +
      +
      6. +
    6. Edit the src/soc/<Vendor>/<Chip Family>/memmap.c file +
        +
      1. Add the fsp/memmap.h include file
        2. +
      2. Add the mmap_region_granularity routine
        3. +
      +
      7. +
    7. Add the necessary .h files to define the necessary values and structures
      8. +
    8. When successful port 0x80 will output the following values: +
        +
      1. 0x01: POST_RESET_VECTOR_CORRECT + - Bootblock successfully executed the + reset vector + and entered the 16-bit code at + _start +
        2. +
      2. 0x10: POST_ENTER_PROTECTED_MODE + - Bootblock executing in + 32-bit mode +
        3. +
      3. 0x10 - Verstage/romstage reached 32-bit mode
        4. +
      +
      9. +
    + +

    + Build Note: The following files are included into the default bootblock image: +

    + + +

    Modified: 31 January 2016

    diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 1dbef9cbda..b41a8de289 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -69,6 +69,7 @@
  • Get result to start booting
  • Early Debug
    • +
  • Implement and debug the bootblock code
    • -- cgit v1.2.3